Realizacje układów odwracalnych w technologiach półprzewodnikowych

• Autorzy: Szyprowski M. , Kerntopf P.

Warianty tytułu

EN

Implementation of reversible circuits in semiconductor technologies

• Języki publikacji: PL

Abstrakty

PL

Dziedzina syntezy odwracalnych układów logicznych jest rozwijana bardzo intensywnie. Zaproponowane zostały nawet konstrukcje układów odwracalnych z klasycznych elementów półprzewodnikowych. Wykazują one szereg zalet, m.in. mogą być stosowane jako układy o bardzo małym poborze mocy lub są w stanie realizować pewne klasy algorytmów obliczeń kwantowych. W poniższym referacie przedstawiamy przegląd rozwiązań realizacji układów odwracalnych z wykorzystywaniem klasycznych elementów półprzewodnikowych.

EN

Synthesis of reversible functions (i.e. bijective mappings) is an emerging research area. It is mainly motivated by advances in quantum computing and application of reversible circuits to quantum computing. However, some research has also been done in the area of implementation of reversible circuits in classic semiconductor technologies. Such circuits, built mainly from CMOS transistors, reveal their advantages. They can be successfully applied to the area of low power design. Recently, more attention has also been given to such circuits as they can also be used to implement some classes of quantum algorithms and take the advantage of quantum computing to stretch the limits of the classical computation paradigms. This paper gives an overview of the present advances in the field of reversible circuits built in semiconductor technologies. It describes reversible circuits built from CMOS transistor based switching networks and principles of adiabatic circuits. The last part of the paper presents the foundation of quantum computatiosn that can be realized by reversible circuits with asynchronous feedback.

Słowa kluczowe

PL

układy odwracalne; układy CMOS; reversible circuits

EN

reversible circuits; CMOS circuits

• Wydawca: Wydawnictwo PAK
• Czasopismo: Pomiary Automatyka Kontrola
• Rocznik: 2011
• Tom: R. 57, nr 8
• Strony: 911--913
• Opis fizyczny: Bibliogr. 30 poz., rys., schem., wzor

Twórcy

autor

Szyprowski M.

autor

Kerntopf P.

• Politechnika Warszawska, Wydział Elektroniki, Instytut Informatyki, ul. Nowowiejska 15/19, 00-665 Warszawa,

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