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Warianty tytułu
Exploiting iterative compilation in the software layer of embedded systems optimization
Języki publikacji
Abstrakty
Artykuł dotyczy wykorzystania kompilacji iteracyjnej do optymalizacji warstwy programowej systemów wbudowanych. W oparciu o autorskie narzędzie WIZUTIC zminejszono czas przetwarzania algorytmu szyfrowania DES. Danymi wejściowymi kompilatora są programy sekwencyjne, wynikami programy zrównoleglone zgodnie ze standardem OpenMP oraz zoptymalizowane pod względem lokalności danych. Parametrem kompilacji iteracyjnej jest rozmiar bloku dla transformacji pętli programowej-tiling.
Embedded systems are special-purpose computers that perform one or few dedicated tasks. They are mostly part of larger electronic devices, such as communication devices, home appliances, office automation, business equipment, automobiles, etc. Complexity of computers has grown tremendously in recent years, because multi-core processors are in widespread use. Parallelized programs must be run on multi-core processors to use the most of its computing power. Exploiting parallel compilers for automatic parallelization of sequential programs accelerates design processes and reduces costs of the designed systems. In this paper there is described a WIZUTIC iterative compiler developed by the Faculty of Computer Science and Information Technology of the West Pomeranian University of Technology. It uses the source code of PLUTO parallel compiler developed at the Ohio State University by Uday Bondhugula. A simulated annealing algorithm is used for finding optimization passes for the given program features. Parameters that are changed in each iteration are tile sizes of loop transformation tiling. Experimental tests are described and the speed-up results obtained for the DES encryption algorithm are given.
Wydawca
Czasopismo
Rocznik
Tom
Strony
701--704
Opis fizyczny
Bibliogr. 15 poz., rys., tab.
Twórcy
autor
autor
autor
- Zachodniopomorski Uniwersytet Technologiczny w Szczecinie, Katedra Inżynierii Oprogramowania, ul. Żołnierska 49, 71-210 Szczecin, twiercinski@wi.zut.edu.pl
Bibliografia
- [1] Vahid F., Givargis T.: Embedded System Design. A Unified Hardware/ Software Introduction, John Wiley & Sons, Inc., 2002.
- [2] Wolfe M.: High Performance Compilers for Parallel Computing. Addison-Wesley, 1996.
- [3] Bondhugula U.: Effective Automatic Parallelization and Locality Optimization using the Polyhedral Model, Ohio State University, 2008.
- [4] http://pluto-compiler.sourceforge.net/
- [5] Aho A. V., Lam M. S., Sethi R., Ullman J. D.: Compilers: Principles, Techniques and Tools, 2nd Edition. Addison-Wesley, 2006.
- [6] Allen R., Kennedy K.: Optimizing compilers for modern architectures: A Dependence-based Approach. Morgan Kaufmann Publishers, Inc., 2001.
- [7] Almagor L., Cooper K. D. i inni: Finding effective compilation sequences. In: LCTES’04, Wahsington, DC, USA, 2004.
- [8] Knijnenburg P., Kisuki T., O’Boyle M.: Iterative compilation. Embedded Processor Design Challenges: Systems, Architectures, Modelling and Simulation - SAMOS, 2002.
- [9] Knijnenburg P., Kisuki T., O’Boyle M.: M. Combined selection of tile sizes and unroll factors using iterative compilation. Journal of Supercomputing, 2003.
- [10] Knijnenburg P., Kisuki T., Gallivan K.: Cache Models for Iterative Compilation., Proc. Euro-Par, 2001. Springer Lecture Notes in Computer Science 2150, 2001.
- [11] OpenMP Application Program Interface, Version 3.0, May 2008.
- [12] Kirkpatrick S., Gelatt C. D., Vecchi M. P.: Optimization by Simulated Annealing, Morgan Kaufmann Publishers Inc., 1987.
- [13] FIPS 46-3 Data Encryption Standard (DES), U.S. DEPARTMENT OF COMMERCE/National Institute of Standards and Technolog, 1999.
- [14] Menezes A., van Oorschot P., Vanstone S.: Handbook of Applied Cryptography, CRC Press Online, 1996.
- [15] Schneier B.: Applied Cryptography: Protocols, Algorithms, and Source Code in C, Second Edition, John Wiley & Sons, 1995.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BSW4-0083-0016