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Enslavement and control in dq synchronous frame for a cascade using multilevel inverter NPC

Wybrane pełne teksty z tego czasopisma
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Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
The aim of this paper is to give a solution to unbalance problem of the input DC voltages of the nine-level NPC-VSI in dq synchronous frame. For that, we used in high voltage and great power applications, one two-level PWM current rectifier-nine-level NPC VSI-PMSM cascade. In the first part, we develop a knowledge model of the Nine-level NPC VSI and propose a space vector modulation of this converter using eight bipolar carriers. After that, this study shows particularly the problem of the stability of the DC voltages of the inverter and its consequence on the performances of the PMSM speed control. Then, we propose a solution to the problem by employed closed loop regulation using classic PI controller mode in d-q synchronous frame. We add a Clamping bridge to stabilize the eight DC input voltages of the nine-level NPC VSI. This cascade found applications in great power and high voltage fields as electrical traction.
Rocznik
Strony
497--513
Opis fizyczny
Bibliogr. 10 poz., rys.
Twórcy
autor
autor
  • Laboratory of Instrumentation and Engineering System, University of Science and Technology Houari Boumediene, Algiers, Algeria, dberiber@yahoo.fr
Bibliografia
  • [1] A. NABAE, I. TAKAHASHI and H. AKAGI: A new neutral point clamped PWM inverter. IEEE Trans. Industry Applications, IA-17(5), (1981), 518-523.
  • [2] L. M. TOLBERT et al.: Change balance control schemes for cascade multilevel converter in hybrid electric vehicles. IEEE. Trans. Industry Electronics, 49(5), (2002), 1058-1064.
  • [3] H. GHERAIA et. al.: Modelling and control of a seven level NPC voltage source inverter. Application to high power induction drive. The European Physical (2001), 105-115.
  • [4] B. P. GRATH et. al.: Reduced PWM harmonics distortion for multilevel inverters operating over a wide modulation range. IEEE Trans. Power Electronics, 21(4), (2006).
  • [5] F. BOUCHAFAA et. al.: Analysis and simulation of a nine-level voltage source inverters. Application to the speed control of the PMSM. Electromotion 1, 10(3), (2003), 246-251.
  • [6] F. BOUCHAFAA et. al.: Analysis and stabilisation of input DC voltages of the nine-level NPC voltage source inverter. Proc. Mt. Conf. Electrical Engineering Computer, Proceedings IEEE Catalog Number: 04EX893C, ISBN: 0-7803-8576-4, Cairo, Egypt, (2004), 835-839.
  • [7] P. KARLSON et. al.: DC bus voltage control for a distributed power system. IEEE Trans. Power Electronics, 18(6), (2003).
  • [8] N. HOR, J. JUNG and K. NAM: A fast dynamic DC link power-balancing scheme for PWM converter-inverter. IEEE Trans. Industrial Electronics, 8(4), (2001).
  • [9] ZH. PENG and J. SH. LAI: Dynamic performances and control of a static VAR generator using cascade multilevel inverters. IEEE Trans. Industry Applications, 33(3), (1997).
  • [10] R. STRZELECKI, C. BENYESEK and J. RUSINSKI: Analysis of DC link capacitor voltage balance in multilevel active power filters. EPE2001, Gratz, Austria, (2001).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BSW3-0048-0012
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