Two heuristic alghorithms for test point selection in analog circuit diagnoses

• Autorzy: Pułka A.
• Języki publikacji: EN

Abstrakty

EN

The paper presents a heuristic approach to the problem of analog circuit diagnosis. Different optimization techniques in the field of test point selection are discussed. Two new algorithms: SALTO and COSMO have been introduced. Both searching procedures have been implemented in a form of the expert system in PROLOG language. The proposed methodologies have been exemplified on benchmark circuits. The obtained results have been compared to the others achieved by different approaches in the field and the benefits of the proposed methodology have been emphasized. The inference engine of the heuristic algorithms has been presented and the expert system knowledge-base construction discussed.

Słowa kluczowe

EN

analog circuit diagnosis; fault diagnosis; testing; search methods; heuristic optimization

• Wydawca: Komitet Metrologii i Aparatury Naukowej PAN
• Czasopismo: Metrology and Measurement Systems
• Rocznik: 2011
• Tom: Vol. 18, nr 1
• Strony: 115--128
• Opis fizyczny: Bibliogr. 27 poz., rys., tab.

Twórcy

autor

Pułka A.

• Silesian University of Technology, Faculty of Automatic Control, Electronics and Computer Science, Institute of Electronics, Akademicka 16, 44-100 Gliwice, Poland,

Bibliografia

• [1] Huertas, I.L. (1993). Test and design for testability of analog and mixed-signal integrated circuits: theoretical basis and pragmatical approaches. Proceedings of ECCTD’93 Conference, 75–156.
• [2] Pułka, A. (2007). A Heuristic Fault Dictionary Reduction Methodology. Proceedings of IEEE ICECS 2007 Conference. Marakesh. MOROCCO, 1115–1118.
• [3] Pułka, A. (May 2009). Decision Supporting System Based on Fuzzy Default Reasoning. Proceedings of the HSI’09 Human Systems Interaction Conference. Catania. Italy, 32-39.
• [4] Kondagunturi, R., Bradley, E., Maggard K., Stroud, C. (1999). Benchmark Circuits for Analog and Mixed-Signal Testing. Proceedings of IEEE Southeastconf’99, 217-220.
• [5] Lin, P.M., Elcherif, Y.S. (1985). Analogue circuits fault dictionary-New approaches and implementation. Journal of Circuit Theory Applications, 13, 149-172.
• [6] Hochwald, W., Bastian, J.D. (1979). A dc approach for analog fault dictionary determination. IEEE Transactions on Circuits and Systems, 26, 523–529.
• [7] Rutkowski, J. (1993). A DC Approach for Analog fault dictionary determination. Proceedings of ECCTD’93 Conference, 877-880.
• [8] Kamińska, B., Arabi, K., Bell, I., Goteti, P., Huertas, J.L., Kim, B., Rueda, A., Soma, M. (1997). Analog and Mixed-Signal Benchmark Circuits - First Release. Proceedings of ITC’97, 183-190.
• [9] Golonek, T., Rutkowski, J. (2007). Genetic-Algorithm-Based Method for Optimal Analog Test Points Selection. IEEE Transactions on Circuits and Systems - II: Express Briefs, 54(2), 117-121.
• [10] Yang, C., Tian, S., Long, B. (2009). Application of Heuristic Graph Search to Test-Point Selection for Analog Fault Dictionary Techniques. IEEE Transactions on Instrumentation and Measurements, 58 (7), 2145-2158.
• [11] Jiang, R., Wang, H., Tian, S., Long, B. (2010). Multidimensional Fitness Function DPSO Algorithm for Analog Test Point Selection. IEEE Transactions on Instrumentation and Measurement, 59(6), 1634-1641.
• [12] Farreny, H. (1999). Completeness and Admissibility for General Heuristic Search Algorithms-A Theoretical Study: Basic Concepts and Proofs. Kluwer Academic Publisher. Journal of Heuristics, 5(99), 353-376.
• [13] Jiang Cui, Youren Wang (2010). A novel approach of analog fault classification using a support vector machines classifier. Metrology and Measurement Systems, 17(4), 561-582.
• [14] Starzyk, J.A., Nelson, D.E., Sturtz, K. (2000). A mathematical foundation for improved reduct generation in information systems. Knowledge Informative Systems, 2(2), 131-146.
• [15] Czaja, Z., Zielonko, R. (2003). Fault diagnosis in electronic circuits based on bilinear transformation in 3-D and 4-D spaces. IEEE Transactions on Instrumentation and Measurements, 52(1), 97-102.
• [16] Bandler, J.W., Salama, A.E. (1981). Fault diagnosis of analog circuits. Proceedings of IEEE, 73, 1279-1325.
• [17] Jantos, P., Grzechca, D., Rutkowski J. (2009). Fault diagnosis in analog electronic circuits - the SVM approach. Metrology and Measurement Systems, 16(4), 583-598.
• [18] Toczek, W. (2009). Testing and Diagnostics Strategies for Analog Electronic Circuits, D.Sc. Thesis. Gdańsk University of Technology. Gdańsk. (in Polish).
• [19] Manetti, S., Piccirilli M., Liberatore, A. (1990). Automatic test point selection for linear analog network fault diagnosis. Proceedings of IEEE ISCAS’90, 1, 25-28.
• [20] Tadeusiewicz, M., Hałgas, S. (August - September 2008). An efficient method for simulation of multiple catastrophic faults. Proceedings of IEEE ICECS 2008 Conference. Malta, 356-359.
• [21] Prasad, V.C., Babu, N.S.C. (2000). Selection of test nodes for analog fault diagnosis in dictionary approach. IEEE Transactions on Instrumentation and Measurement, 49, 1289-1297.
• [22] Starzyk, J.A., Dong Liu, Zhi-Hong Liu, Nelson, D.E., Rutkowski, J. (2004). Entropy-Based Optimum Test Points Selection for Analog Fault Dictionary Techniques. IEEE Transactions on Instrumentation and Measurements, 53, 754-761.
• [23] Benchmark circuits. http://www.eng.auburn.edu/~strouce/analogbc/BCoverview.htm (January 2011).
• [24] Logic Programming Associates Ltd. Official Web Site. http://www.lpa.co.uk/ (January 2011).
• [25] Reiter, R. (1980). A logic for default reasoning. Artificial Intelligence, 13, 81-132.
• [26] Zadeh, L.A. (2008). Is there a need for fuzzy logic?. Information Sciences, 178(13), 2751-2779.
• [27] Miura, Y., Kato, J. (2006). Fault Diagnosis of Analog Circuits Based on Adaptive Test and Output Characteristics. Proceedings of the 21st IEEE DFT’06, 410-418.