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Modelowanie i testowanie przetworników analogowo-cyfrowych i cyfrowo-analogowych - przegląd aktualnego stanu
Języki publikacji
Abstrakty
The analog to digital front ends of measuring instruments affect crucially the interpretation of the signals acquired from the real world into the digital domain and their back presentation. The signal processing in the digital domain due to its stability meets usually the requirements on the uncertainty of the measuring instruments easily. ADCs and DACs influence dominantly the accuracy of instruments and limit the signal dynamics and their applicability. An exact error description and standardized testing methods are required by the end user. Moreover, the simplification of the error description by dominant error parameters is a permanent task for the metrologist and producers. This paper is aimed at providing a metrological overview of ADC and DAC topics by referring to their: i) architectures, ii) modelling and testing, and iii) standardization.
Praca stanowi przegląd aktualnego stanu problematyki modelowania i testowania przetworników analogowo-cyfrowych (A/C) i cyfrowo-analogowych (C/A). Przedstawiono w niej modele błędów różnych typów przetworników A/C oraz standardowe i nowe metody testowania przetworników A/C i C/A z uwzględnieniem testów statystycznych i dynamicznych.
Czasopismo
Rocznik
Tom
Strony
231--248
Opis fizyczny
Bibliogr. 39 poz., rys., wykr.
Twórcy
autor
- Technical University of Lisbon, Department of Electrical Engineering and Computers, Portugal
autor
- University of Sannio, Department of Engineering, 82100 Benevento, Italy
autor
- Technical University of Košice, Department of Electronics and Telecommunications, Slovakia
Bibliografia
- 1. Stefani F., Moschitta A., Macii D., Carbone P., Petri D.: Fast estimation of A/D converter nonlinearities. Proc. of 13th IMEKO TC4 International Symposium, Athens, Greece, 2004, pp. 841-846.
- 2. IEEE Std. 1057-1994 Standard for digitizing waveform records, The Institute of Electrical and Electronics Engineers, Inc., New York, 1994.
- 3. IEEE 1241-2000 Standard for Analog to Digital Converters, The Institute of Electrical and Electronics Engineers, Inc., New York, 2001.
- 4. Bernieri A., Daponte P., Grimaldi D.: ADC neural modeling, IEEE Trans. on Instrum. and Meas., 1966, vol.45, no. 2, pp. 627-633.
- 5. Grimaldi D., Michaeli L., Michalko P.: Identification of ADC error model by testing of the chosen code bins, Proc. Of 12th IMEKO TC4 Symposium, Zagreb, Croatia, 2002, pp. 132-137.
- 6. Serra A.C., Da Silva M. F., Ramos P., Michaeli L., Šaliga J.: Combined spectral and histogram analysis for fast ADC testing, Trans. on Instrum. and Meas., 2005, vol. 53, no. 4 , pp. 940-946.
- 7. Attivissimo F, Giaquinto N., Kale I.: INL reconstruction of A/D converters via parametric spectral estimation, Trans. on Instrum. and Meas., 2004, vol. 53, no. 4 , pp. 940-946.
- 8. Mirri D., Iuculano G., Filicori F., Pasini G., Vannini G.: Modeling of non ideal dynamic characteristics in S/H-ADC devices, Proc. of IEEE IMTC/95, p. 27.
- 9. Mikulik P., Saliga J.: Volterra filtering for integrating ADC error correction, based on an a-priori error model, IEEE Trans. on Instrum. and Meas., 2002, vol. 51, no. 4 , pp. 870-875.
- 10. Mikulik P., Saliga J.: Realisation of ADC error correction based on Volterra filtering, Proc. of 12th IMEKO TC4 International Symposium, Zagreb, Croatia, 2002, pp. 142-145.
- 11. Awad S. S., Wagdy M. F.: More on jitter effects on sinewave measurement, IEEE Trans.on Instrum. and Meas., 1991, vol. 40, no.3, pp.549-555.
- 12. Arpaia P., Daponte P., Rapuano S.: A state of the art on ADC modeling Comp. Stand. & Interf., 2004, vol.26, no.1, pp. 31-42.
- 13. Macii D.: A novel approach for testing and improving the static accuracy of high performance digital-to-analog converters, Proc. of 8th Int. Workshop on ADC Modelling and Testing, Perugia, Italy, 2003, pp.197-200.
- 14. Doyle J. T., Young J. L., Yong-Bin K.: An accurate DAC modeling technique based on wavelet theory, Proc. of CICC ’03, San Jose, California, 2003, pp.257-260.
- 15. Albrecht S., Gothenberg, Sumi, Tenhunen: A study of nonlinearities for a frequency-locked loop principle [frequency synthesizer application], Proc. of Southwest Symp. on Mixed-Signal Design, Las Vegas, USA, 2003, pp.71-75.
- 16. Kosunen M., Vankka J., Teikari I., Halonen K.: DNL and INL yield models for a current-steering D/A converter, Proc. of ISCAS ’03, Bangkok, Thailand, vol.1, pp. 969-972.
- 17. Chen T., Gielen G.: Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters, Proc. of ISCAS ’03, Bangkok, Thailand, vol.1, pp. 973-976.
- 18. De Maeyer J., Rombouts P., Weyten L.: Addressing static and dynamic errors in unit element multibit DACs, Electronics Letters, 2003, vol.39, no.14, pp. 1038-1039.
- 19. Alegria F. C., Arpaia P., Daponte P., Serra A.C.: ADC histogram test using small-amplitude input waves, Proc. of XVI IMEKO World Congress, Austria, 2000, vol. 10, pp. 9-14.
- 20. Alegria F., Arpaia P., Daponte P., Serra A. C.: An ADC histogram test based on small-amplitude waves, Measurement, Elsevier Science B. V., 2002, vol. 31, no. 4, pp. 271-279.
- 21. Alegria F. C., Arpaia P., Serra A. C., Daponte P.: Performance analysis of an ADC histogram test using small triangular waves, IEEE Trans. on Instrum. and Meas., 2002, vol.51, no.4, pp. 723-729.
- 22. IEC standard 62008, Performance characteristics and calibration methods for digital data acquisition systems and relevant software, August 2005.
- 23. Blair J.: Histogram measurement of ADC nonlinearities, IEEE Trans. on Instr. and Meas., 1994, vol.43, pp. 373-383.
- 24. Vargha B., Schoukens J., Rolain Y.: Static nonlinearity testing of digital-to-analog converters, IEEE Trans. on Instrum. and Meas., 2001, vol.50, no.5, pp. 1283-1288.
- 25. Fasang P. P.: An optimal method for testing digital to analog converters, Proc. 10th IEEE Inter. ASIC Conf. and Exhibit, Portland, USA, 1997, pp. 42-46.
- 26. Vargha B., Schoukens J., Rolain Y.: Using reduced-order models in D/A converter testing, Proc. of IEEE IMTC ‘02, Anchorage, USA, pp. 701-706.
- 27. Arabi K., Kaminska B., Sawan M.: On chip testing data converters using static parameters, IEEE Trans. on Very Large Scale Integration (VLSI) System, 1998, vol.6, no.3, pp. 409-418.
- 28. Wen Y. C., Lee K. J.: BIST structure for DAC testing, Electronic Letters, 1998, vol.34, no.12, pp. 1173-1174.
- 29. Hassan I. H. S., Arabi K., Kaminska B.: Testing digital to analog converters based on oscillation-test strategy using sigma-delta modulation, Proc. of ICCD’98, Austin, Texas, pp. 40-46.
- 30. Leme C. A., Franca J. E.: Error detection and analysis in self-testing data conversion systems employing charge redistribution techniques, Proc. of IEEE ISCAS ‘91, Singapore, vol.3, pp.1517-1520.
- 31. Huang J. L., Ong C. K., Cheng K. T.: A BIST scheme for on-chip ADC and DAC testing, Proc. of Design, Automation and Test in Europe Conf. and Exhibition, Paris, France, 2000, pp. 216-220.
- 32. Chang S. J., Lee C. L., Chen J. E.: BIST scheme for DAC testing, Electronic Letters, 2002, vol.38, no.15, pp.776.
- 33. Sunil Rafeeque K. P., Vasudevan V.: A built-in-self-test scheme for digital to analog converters, Proc. of VLSID ’04, Mumbai, India, pp. 1027-1032.
- 34. IEEE Standard 746, IEEE standard for performance measurements of A/D and D/A converters for PCM television video circuits, 1984.
- 35. Jedec Standard 99, A. 01, Terms, definitions, and letter symbols for microelectronic devices, 2000.
- 36. EBU Tech. Information I15-1998, Testing for conformity with ITU-R recommendations BT.601 and BT.656, 1998.
- 37. Martins R., Cruz Serra A.: Automated ADC characterization using the histogram test stimulated by Gaussian noise, IEEE Trans. Instr. Meas., 1999, vol. 48, pp. 471-474.
- 38. Martins R., Cruz Serra A.: ADC characterization by using the histogram test stimulated by Gaussian noise Theory and experimental results, Measurement, Elsevier Science B. V., 2000, vol. 27, pp. 291-300.
- 39. Arpaia P., Cruz Serra A., Daponte P., Monteiro C.: A Critical Note to IEEE 1057-94 Standard on Hysteretic ADC Dynamic Testing, IEEE Trans. on Instrumentation and Measurement, 2001, vol. 50, no. 4, pp. 941- 948.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BSW1-0021-0001