Identyfikatory
Warianty tytułu
Języki publikacji
Abstrakty
Image processing in industrial vision systems requires both real-time speed and robustness. Modern computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.
Rocznik
Tom
Strony
105--110
Opis fizyczny
Bibliogr. 5 poz., rys.
Twórcy
autor
- Institute of Computer Engineering, Automation and Robotics, Wrocław University of Technology ul. Janiszewskiego 11/17, 50–372 Wrocław, Poland, marek.wnuk@pwr.wroc.pl
Bibliografia
- [1] Drzazga A., Hajdul J., Malec J. and Wnuk M. (1983). Hardware image preprocessor, Technical Report,Wrocław University of Technology (in Polish).
- [2] Dudani S., Breeding K. and McGhee R. (1977). Aircraft identification by moment invariants, IEEE Transactions on Computers, 26(1): 39-46.
- [3] SGS-THOMSONMicroelectronics (1994). IMSA110 Image and Signal Processing Sub-system, http://www.datasheetcatalog.com.
- [4] Texas Instruments Europe (1997). Implementation of an Image Processing Library for the TMS320C8x, BPRA059, http://www.datasheetcatalog.com.
- [5] Xilinx, Inc. (2007). Spartan-3A DSP FPGA Family: Complete Data Sheet, DS610, http://www.datasheetcatalog.com.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BPZ1-0044-0010