Scaling organic transistors: materials and design

Paasch, G.; Scheinert, S.

Artykuł - szczegóły

Tytuł artykułu

Scaling organic transistors: materials and design

Autorzy

Paasch G. , Scheinert S.

Wybrane pełne teksty z tego czasopisma

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Warianty tytułu

Języki publikacji

Abstrakty

Envisaged applications of organic thin-film transistors in future polymer electronics lead to requirements on the supply voltage, threshold voltage, sub threshold characteristics, on-off ratio, and cut-off frequency. We present an analysis of the corresponding requirements using both analytical estimates and numerical two-dimensional simulations. Of special importance are the connections between cut-off frequency, channel length and mobility, mobility and doping, thicknesses of the active layer and gate insulator, doping, interface charges and states, and threshold voltage, traps and subthreshold slope. They lead to demands on both material properties and transistor design. Considering a minimum application-relevant cut-off frequency and a limitation of the mobility for low-cost solution-based deposition, one is led inevitably to the need of a submicrometer channel length and rather thin organic gate insulator. Experimental realization is shown and an approach to submicrometer organic CMOS is discussed.

Słowa kluczowe

polymer electronics transistor organics scaling

Wydawca

De Gruyter

Czasopismo

Materials Science Poland

Rocznik

2004

Tom

Vol. 22, No. 4

Strony

423--434

Opis fizyczny

Bibliogr. 28 poz.

Twórcy

autor

Paasch G.

g.paasch@ifw-dresden.de.

Leibniz Institute for Solid State and Materials Research IFW Dresden, D-01171 Dresden, Germany

autor

Scheinert S.

Ilmenau Technical University, D-98684 Ilmenau, Germany

Bibliografia

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[24] PAASCH G., LINDNER T., ROST C., RIEß W., KARG S., SCHEINERT S., in preparation.
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