Method for fault diagnosis of nonlinear analog circuits piecewise linear type

• Autorzy: Robotycki A. , Zielonko R.
• Konferencja: 19th IMEKO TC-10 International Conference on Technical Diagnostics. Integration in Technical Diagnostics (22-24.09.1999 ; Wrocław)
• Języki publikacji: EN

Abstrakty

EN

The paper deals with fault location of the PWL type analog circuits based on verification approach and hybrid equations. In the first part of the paper the diagnostic equation, fault models and algorithm of the method are described. For verification of fault hypothesis the residual square sum criterion is applied. Theoretical considerations have been illustrated by example of single fault diagnosis of the three-stage transistor amplifier. The method could be used also to diagnosis of circuits with multiple faults.

Słowa kluczowe

EN

diagnosis of analog circuits; piecewise linear models; verification method

• Wydawca: Oficyna Wydawnicza Politechniki Wrocławskiej
• Czasopismo: Prace Naukowe Instytutu Górnictwa Politechniki Wrocławskiej. Konferencje
• Rocznik: 1999
• Tom: Vol. 86, nr 24
• Strony: 218--223
• Opis fizyczny: Bibliogr. 6 poz, rys. 6

Twórcy

autor

Robotycki A.

autor

Zielonko R.

• Technical University of Gdańsk, Chair of Electronic Measurement, Narutowicza 11/12 Street, 80-952 Gdańsk, Poland