New approach to power semiconductor devices modeling

• Autorzy: Napieralski A. , Napieralska M.
• Języki publikacji: EN

Abstrakty

EN

The main problems occurring during high power device modeling are discussed in this paper. Unipolar and bipolar device properties are compared and the problems concerning high time-constant values related to the diffusion phenomena in the large base are explained. Traditional and novel concepts of power device simulation are presented. In order to make accurate and modern semiconductor device models widely accessible, a website has been designed and made available to Internet users, allowing them to perform simulations of electronic circuits containing high power semiconductor devices. In this software, a new distributed model of power diode has been included. Together with the existing VDMOS macromodel library, the presented approach can facilitate the design process of power circuits. In the future, distributed models of IGBT, BJT and thyristor will be added.

Słowa kluczowe

EN

power device modeling; SPICE; circuit simulation; VDMOS; PIN diode; IGBT; web-based simulation

• Wydawca: Instytut Łączności - Państwowy Instytut Badawczy
• Czasopismo: Journal of Telecommunications and Information Technology
• Rocznik: 2004
• Tom: nr 1
• Strony: 80--89
• Opis fizyczny: Bibliogr. 35 poz., tab., rys.

Twórcy

autor

Napieralski A.

• Department of Microelectronics and Computer Science, Technical University of Łódź, av. Politechniki 11, 93-590 Łódź

autor

Napieralska M.

• Department of Microelectronics and Computer Science, Technical University of Łódź, av. Politechniki 11, 93-590 Łódź

Bibliografia

• [1] H. Benda, A. Hoffmann, and E. Spenke, „Switching processes in alloyed PIN rectifiers", Solid State Electron., vol. 8, pp. 887-906, 1965.
• [2] K. Djellabi, M. Napieralska, H. Tranduc, P. Rossel, and K. Kassmi, „Modeles du transistor MOS de puissance", Rev. Gén. El_eectr., no. 6, pp. 8-16, 1992.
• [3] M. Furmańczyk, „Elektrotermiczna symulacja układów VLSI ze szczególnym uwzględnieniem integracji w środowisku projektowania". Politechnika Łódzka, Łódź, 1999 (Ph.D. thesis in Polish).
• [4] H. Goebel, „A unified method for modeling semiconductor power devices", IEEE Trans. Pow. Electron., vol. 9, no. 5, pp. 497-505, 1994.
• [5] M. Grecki, „Dwuwymiarowe modelowanie bipolarnych i unipolarnych struktur półprzewodnikowych". Politechnika Łódzka, Łódź, 1995 (Ph.D. thesis in Polish).
• [6] M. Grecki, G. Jabłoński, and A. Napieralski, „Transient temperature evaluation during switching process in IGBT transistor", in Proc. 4th Int. Sem. Pow. Semicond. ISPS, Prague, Czech Republic, 1998, pp. 119-124.
• [7] M. Grecki, M. Turowski, and A. Napieralski, „2D analysis of more then one semiconductor devices together with external circuit", in Proc. Fifth IEE Int. Conf. Pow. Electron. Var.-Speed Driv. PEVD, London, England, 1994, pp. 441-446.
• [8] M. Grecki, G. Jabłoński, and A. Napieralski, „MOPS - parallel environment for simulation of electronic circuits using physical models of semiconductor devices", in Proc. 4th Eur. PVM/MPI Users' Group Meet., Kraków, Poland, 1997, pp. 478-485.
• [9] G. Jabłoński: „Komputerowa analiza układów elektronicznych z zastosowaniem wielowymiarowych modeli fizycznych przyrządów półprzewodnikowych mocy". Politechnika Łódzka, Łódź, 1999 (Ph.D. thesis in Polish).
• [10] M. Janicki, „Thermal modelling of semiconductor structures with special consideration of inverse problem methods for parameter estimation". Ph.D. thesis, Technical University of Łódź, Łódź, Poland, 1999.
• [11] M. Janicki, M. Zubert, and A. Napieralski, „Application of inverse problem algorithms for integrated circuit temperature estimation", Microelectron. J., vol. 30, pp. 1099-1107, 1999.
• [12] M. Janicki, G. De Mey, and A. Napieralski, „Transient thermal analysis of multilayered structures using Green's functions", Microelectron. Reliab., vol. 42, no. 7, pp. 1059-1064, 2002.
• [13] M. Janicki, G. De Mey, and A. Napieralski, „Application of Green's functions for analysis of transient thermal states in electronic circuits", Microelectron. J., vol. 33, no. 9, pp. 733-738, 2002.
• [14] Ph. Leturcq, J. Gaubert, A. Napieralski, and Z. Khatir, „Simulation sur microcalculateur de l'ouverture des thyristors GTO", Rev. Gén. Electr., no. 1, pp. 40-48, 1990.
• [15] Ph. Leturcq, M. O. Berraies, J.-P. Laur, and P. Austin, „Full dynamic power bipolar device models for circuit simulation", in Proc. Record. Pow. Electron. Special. Conf. PESC, Fukuoka, Japan, 1998, pp. 1695-1703.
• [16] D. Levy, G. Puppo, and G. Russo, „Central WENO schemes for hyperbolic systems of conservation laws", Math. Model. Numer. Anal., vol. 33, no. 3, pp. 547-571, 1999.
• [17] R. Maimouni, M. Belabadia, P. Rossel, H. Tranduc, D. Allain, C. E. Cordonnier, M. Napieralska, and J. Costa Freire, „Modele SPICE du transistor V.DMOS pour circuits de commutations", in Proc. L'Electronique de Puissance du Futur, Bordeaux, France, 1988.
• [18] R. Maimouni, D. Allain, M. Napieralska, H. Tranduc, P. Rossel, and C. E. Cordonnier, „Model library for power MOSFETs in switching circuits and converters", in Proc. Mediterr. Electrotech. Conf. ELECON, Lisbon, Portugal, 1989.
• [19] R. Maimouni, P. Rossel, D. Allain, M. Napieralska, H. Tranduc, and C. E. Cordonnier, „Modele „universel" du transistor MOS de puissance pour le logiciel SPICE", in J. d'Etud. SEE „Simulation en Electronique de Puissance du Composant au Systeme", Marseille, France, 1989.
• [20] R. Maimouni, P. Rossel, D. Allain, M. Napieralska, H. Tranduc, and C. E. Cordonnier, „Modele universel du transistor MOS de puissance pour le logiciel SPICE", Rev. Gén. Electr., no. 1, pp. 49-59, 1990.
• [21] M. Napieralska, H. Tranduc, P. Rossel, and C. E. Cordonnier, „Bibliotheque de transistors MOS de puissance dans le couplage des logiciels „HyperCard" et „Spice", in Proc. 3eme Coll. Natl. SEE „L'Electronique de Puissance du Futur" EPF, Toulouse, France, 1990.
• [22] M. Napieralska, H. Tranduc, C. E. Cordonnier, J. P. Berry, and P. Rossel, „Power MOSFET's library builder for switching circuits simulation and design", in Proc. Symp. Mater. Dev. Pow. Electron. MADEP, Florence, Italy, 1991.
• [23] M. Napieralska, „Modelisation du transistor V.DMOS pour simulation de circuits en électronique de puissance". Ph.D. thesis, INSA, Toulouse, France, 1991.
• [24] A. Napieralski, M. Napieralska, and M. Grecki, „Computer laboratory for CAD of power integrated circuits", in Computer-Aided Design and Computer-Aided Engineering in Electronic Engineering Education, A. Filipkowski, Ed. Warszawa: WUT, 1996, pp. 135-184.
• [25] A. Napieralski and M. Napieralska, Polowe półprzewodnikowe przyrządy dużej mocy. Warszawa: WNT, 1995 (in Polish).
• [26] T. L. Quarles, A. R. Newton, D. O. Pederson, and A. Sangiovanni-Vincentelli, „SPICE3 version 3F5 user's manual", Department of EECS, University of California, Berkeley, USA, 1994.
• [27] L. Starzak, M. Zubert, A. Napieralski, P. Austin, G. Bonnet, M. Marmouget, J.-L. Sanchez, and T. Bordignon, „Physical power diode model and its implementation in SABER environment", in Proc. 8th Int. Conf. Mix. Des. Integr. Circ. Syst. MIXDES, Zakopane, Poland, 2001, pp. 213-220.
• [28] L. Starzak, A. Napieralski, and J. J. Charlot, „VHDL-AMS: a competitor for SPICE in modeling of semiconductor devices", in Proc. Int. Conf. „Modern Probl. Radio Eng., Telecommun. Comput. Sci." TCSET, Lviv-Slavske, Ukraine, 2002, pp. 353-356.
• [29] L. Starzak, M. Zubert, and A. Napieralski, „The new approach to the power semiconductor devices modelling", in Proc. Int. Conf. Model. Simul. Microsyst. MSM, San Juan, Puerto Rico, 2002, pp. 640-644.
• [30] B. Swiercz, L. Starzak, M. Zubert, and A. Napieralski, „An interactive website as a tool for CAD of power circuits", in Tech. Proc. 2003 Nanotech. Conf. Trade Show (NanoTech), San Francisco, USA, 2003, pp. 346-349.
• [31] M. Turowski and A. Napieralski, „Two-dimensional analysis of GTO switching under the influence of external circuit", IEE Proc.-G, Circ., Dev. Syst., vol. 141, no. 6, pp. 483-488, 1994.
• [32] M. Turowski, „Dwuwymiarowe modelowanie półprzewodnikowych przyrządów dużej mocy". Politechnika Łódzka, Łódź, 1992 (Ph.D. thesis in Polish).
• [33] B. Wilamowski, A. Malinowski, and J. Regnier, „Internet as a new graphical user interface for the SPICE circuit simulator", IEEE Trans. Ind. Electron., vol. 48, no. 6, pp. 1266-1268, 2001.
• [34] B. Wilamowski, A. Malinowski, and J. Regnier, „SPICE based circuit analysis using web pages", in Proc. 2000 ASEE Ann. Conf., Saint Louis, USA, 2000.
• [35] M. Zubert, „Wielowymiarowe modelowanie sprzężonych zjawisk fizycznych w nowoczesnych strukturach półprzewodnikowych, z zastosowaniem języka VHDL-AMS i modeli o stałych rozłożonych, ze szczególnym uwzględnieniem modelowania elektrotermicznego układów VLSI oraz Smart Power". Politechnika Łódzka, Łódź, 1999 (Ph.D. thesis in Polish).