Recent developments in vertical MOSFETs and SiGe HBTs

• Autorzy: Hall S. , Buiu O. , Ashburn P. , de Groot K.
• Języki publikacji: EN

Abstrakty

EN

There is a well recognised need to introduce new materials and device architectures to Si technology to achieve the objectives set by the international roadmap. This paper summarises our work in two areas: vertical MOSFETs, which can allow increased current drive per unit area of Si chip and SiGe HBT's in silicon-on-insulator technology, which bring together and promise to extend the very high frequency performance of SiGe HBT's with SOI-CMOS.

Słowa kluczowe

EN

vertical MOSFET; HBT; SOI

• Wydawca: Instytut Łączności - Państwowy Instytut Badawczy
• Czasopismo: Journal of Telecommunications and Information Technology
• Rocznik: 2004
• Tom: nr 1
• Strony: 26--35
• Opis fizyczny: Bibliogr. 16 poz., rys.

Twórcy

autor

Hall S.

• Department of Electrical Engineering & Electronics, University of Liverpol, Liverpol L69 3GJ, U.K.

autor

Buiu O.

• Department of Electrical Engineering & Electronics, University of Liverpol, Liverpol L69 3GJ, U.K.

autor

Ashburn P.

• Department of Electronics & Computer Science, University of Southampton, Highfield SO17 1BJ, U.K.

autor

de Groot K.

• Department of Electronics & Computer Science, University of Southampton, Highfield SO17 1BJ, U.K.

Bibliografia

• [1] T. Schulz, W. Rosner, L. Risch, A. Korbel, and U. Langmann, "Short channel vertical sidewall MOSFETs", IEEE TED, vol. 48, no. 8, pp. 1783-1788, 2001.
• [2] V. R. Rao, F. Wittmann, H. Gossner, and I. Eisele, "Hysteresis behaviour in 85-mm channel length n-MOSFET's grown by MBE", IEEE Trans. Electron. Dev., vol. 43, pp. 973-976, 1996.
• [3] J. Moers, D. Klaes, A. Tonnesmann, L. Vescan, S. Wickenhauseer, M. Marso, P. Kordos, and H. Luth, "19 GHz vertical Si p-channel MOSFET", IEEE Electron. Lett., vol 35, pp. 239-240, 1999.
• [4] J. M. Hergenrother, "The vertical replacement-gate (VRG) MOSFET: a 50 nm MOSFET with lithography-independent gate length", IEDM Tech. Dig., pp. 75-78, 1999.
• [5] K. C. Liu, T. Chin, Q. Z. Lui, T. Nakamura, P. Yu, and P. Asbeck, "A deep submicron Si/Sub 1-x/Ge/Sub/Sub x/Si vertical PMOSFET fabricated by Ge ion implantation", IEEE Electron. Dev. Lett., vol. 19, pp. 13-15, 1998.
• [6] A. C. Lamb, L. S. Riley, S. Hall, V. D. Kunz, C. H. de Groot, and P. Ashburn, "A 50 nm vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket", in Proc. ESSDERC, 2000, pp. 347-350.
• [7] D. Donaghy, S. Hall, V. D. Kunz, C. H. de Groot, and P. Ashburn, "Investigating 50 nm channel length vertical MOSFETs containing a dielectric pocket in a circuit environment", in Proc. ESSDERC, 2002, pp. 499-503.
• [8] M. Jurczak, T. Skotnicki, R. Gwoziecki, M. Paoli, B. Tormen, P. Ribot, D. Dutartre, S. Monfay, and J. Galvier, "Dielectric pockets - a new concept of the junctions for deca-nanometric CMOS devices", IEEE TED, vol. 48, no. 8, pp. 1770-1774, 2001.
• [9] V. D. Kunz, C. H. de Groot, and P. Ashburn, "Method for local oxidation in vertical semiconductor devices using fillets". UK patent application, no. 0128414.0, 2001.
• [10] V. D. Kunz, T. Uchino, C. H. de Groot, P. Ashburn, D. C. Donaghy, S. Hall, Y. Wang, and P. L. F. Hemment, "Reduction of parasitic capacitance in vertical MOSFET's by fillet local oxidation (FILOX)", accepted in IEEE Trans. Electron. Dev.
• [11] V. D. Kunz, C. H. de Groot, P. Ashburn, and S. Hall, "Gain control in SiGe HBTs by the introduction of germanium into polysilicon emitters", accepted in IEEE Trans. Electron. Dev.
• [12] J. F. W. Schiz, J. M. Bonar, A. C. Lamb, F. Christiano, P. Ashburn, P. L. F. Hemment, and S. Hall, "Leakage current mechanisms associated with selective epitaxy in SiGe heterojunction bipolar transistors", IEEE Trans. Electron. Dev., vol. 48, no. 11, pp. 2492-2499, 2001.
• [13] S. Hall, A. C. Lamb, M. Bain, B. M. Armstrong, H. Gamble, H. A. W. El Mubarek, and P. Ashburn, "SiGe HBTs on bonded wafer substrates", Microelectron. Eng., vol. 59, pp. 449-454, 2001.
• [14] M. S. Peter, J. W. Slotboom, D. Terpstra, J. H. Klootwijk, F. van Rijs, and W. B. de Boer, "Base current kink effect in SiGe HBT's', in Proc. ESSDERC, 1999, pp. 716-719.
• [15] T. H. Ning and D. D. Tang, "Method for determining the emitter and base series resistance of bipolar transistors", IEEE Trans. Electron. Dev., vol. 31, no. 4, pp. 409-413, 1984.
• [16] H. S. Gamble, B. M. Armstrong, P. Baine, M. Bain, and D. W. Mc-Neill, "Silicon-on-insulator substrates with buried tungsten silicide layer", Solid State Electron., vol. 45, no. 4, pp. 551-557, 2001.