Static connection patterns-based dispatching schemes for the MSM clos-network switches

• Autorzy: Kleban J. , Węclewski S.
• Konferencja: Poznan Telecommunications Workshop / sympozjum [11; December 7-8, 2006; Poznan]
• Języki publikacji: EN

Słowa kluczowe

EN

Clos-network; packet switching; dispatching algorithm

• Wydawca: Wydawnictwo Politechniki Poznańskiej
• Czasopismo: Poznan University of Technology Academic Journals. Electrical Engineering
• Rocznik: 2007
• Tom: No 54
• Strony: 73--80
• Opis fizyczny: Bibliogr. 11 poz.

Twórcy

autor

Kleban J.

autor

Węclewski S.

• Poznan University of Technology

Bibliografia

• [1]F. M. Chiussi, A. Francini: “Scalable Electronic Packet Switches”, IEEE Journal of Selected Areas in Communications, vol. 21, no. 4, 2003.
• [2]H. J. Chao, C. H. Lam, and E. Oki: Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers, Willey, New York, 2001.
• [3]K. Yoshigoe, K.J. Christensen: “An evolution to crossbar switches with virtual output queuing and buffered cross points'”, IEEE Network, vol. 17, no. 5, pp. 48-56, 2003.
• [4]Y. Tamir and G. Frazier: “High performance multi-queue buffers for VLSI communications switches”, in Proc. Computer Architecture, pp., 343-354.
• [5]T. Anderson, et al.: “High-speed switch scheduling for local-area networks”, ACM Trans, on Computer Systems, vol. 11, no. 4, pp. 319-352, 1993.
• [6]E. Oki, R. Rojas-Cessa, and H. J. Chao: “A pipeline-based approach for maximalsized matching scheduling in input-buffered switches”, IEEE Communications Letters, vol. 5, no. 6, pp. 263-265, 2001.
• [7]E. Oki, Z. Jing, R. Rojas-Cessa, and H. J. Chao: “Concurrent Round-Robin-Based Dispatching Schemes for Clos-Network Switches”, IEEE/ACM Trans, on Networking, vol. 10, no.6, pp. 830-844, 2002.
• [8]K. Pun, M. Hamdi: “Dispatching schemes for Clos-network switches” Computer Networks no. 44, pp.667-679, 2004.
• [9]J. Kleban, A. Wieczorek: “CRRD-OG: A Packet Dispatching Algorithm with Open Grants for Three-Stage Buffered Clos-Network Switches”, IEEE High Performance Switching and Routing 2006, Poznań, June 07-09, 2006, pp.315-320.
• [10]J. Kleban, H. Santos: “Packet Dispatching Algorithms with Static Desynchronization for Three-Stage Buffered Clos-Network Switches”, 4th Polish-German Teletrafic Symposium PGTS 2006, Wroclaw, September 21 -22, 2006, pp. 187-194.
• [11]C. Clos: “A Study of Non-Blocking Switching Networks”, Bell Sys. Tech. Jour., pp. 406-424, March 1953.