Implementacja sieci neuronowej MLP FPNN w strukturze układu programowalnego FPGA

• Autorzy: Grzesiak L. , Erwiński K. , Paprocki M.

Warianty tytułu

EN

Implementation of MLP FPNN neural network in FPGA programmable logic structure

• Języki publikacji: PL

Abstrakty

PL

W artykule przedstawiono opis budowy i implementacji sieci neuronowej typu MLP FPNN w układzie FPGA. Przedstawiono budowę struktury oryginalnej sieci FPNN oraz budowę struktury dwóch sieci będących modyfikacjami oryginalnej sieci FPNN. Sieci neuronowe zostały zaimplementowane w układzie programowalnym. Przeprowadzono badania sprawdzające dokładność i czas realizacji obliczeń wykonywanych przez sieci neuronowe. Otrzymane wyniki potwierdzają zasadność implementacji zmodyfikowanej struktury sieci typu MLP FPNN.

EN

In the article a description of structure and implementation of MLP FPNN neural networks in FPGA’s was presented. Structure of the original FPNN net and its modifications were presented. Neural networks were implemented in programmable logic. Experiments were performed to verify the precision and speed of computations conducted by the neural networks. Results obtained prove the legitimacy of implementing the modified MLP FPNN structure.

Słowa kluczowe

PL

sztuczne sieci neuronowe; FPGA; FPNN; równoległe przetwarzanie

EN

FPGA; FPNN; artificial neural networks; parallel processing

• Wydawca: Wydawnictwo SIGMA-NOT
• Czasopismo: Przegląd Elektrotechniczny
• Rocznik: 2010
• Tom: R. 86, nr 8
• Strony: 217--223
• Opis fizyczny: Bibliogr. 27 poz., rys., tab.

Twórcy

autor

Grzesiak L.

autor

Erwiński K.

autor

Paprocki M.

• Politechnika Warszawska, Instytut Sterowania i Elektroniki Przemysłowej, ul. Koszykowa 75, 00-662 Warszawa,

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