Grid synchronization and symmetrical components extraction with PLL algorithm for grid connected power electronic converters - a review

• Autorzy: Bobrowska-Rafał M. , Rafał K. , Jasiński M. , Kaźmierkowski M.
• Konferencja: Konferencja “Integrated Optics – Sensor, Sensing and Methods” (IOS 2011) Szczyrk, luty 2011
• Języki publikacji: EN

Abstrakty

EN

In this paper, a review of Phase Locked Loop (PLL) algorithms and symmetrical component extraction methods intended for grid-connected power electronic converters are presented. Proposed classification is based on voltage representation in three coordinates: natural (abc), stationary (alfa beta) and rotating coordinates (dq). The three selected algorithms are described in details: Dual Second Order Generalized Integrator (DSOGI-PLL), Dual Virtual Flux – both in stationary coordinates. The third one, in rotating dq coordinates, is Dual Synchronous Reference Frame PLL (DSRF-PLL). A comparison of PLL algorithms is presented. Also, selected experimental results are given to verify practical application of discussed algorithms.

Słowa kluczowe

EN

phase locked loop; symmetrical component extraction; grid synchronization; grid-connected converter; smart grid; renewable energy sources (RES); voltage dip; higher harmonics; power quality

• Wydawca: Polska Akademia Nauk, Wydział IV Nauk Technicznych
• Czasopismo: Bulletin of the Polish Academy of Sciences. Technical Sciences
• Rocznik: 2011
• Tom: Vol. 59, nr 4
• Strony: 485--497
• Opis fizyczny: Bibliogr. 44 poz., rys., tab.

Twórcy

autor

Bobrowska-Rafał M.

autor

Rafał K.

autor

Jasiński M.

autor

Kaźmierkowski M.

• Institute of Control and Industrial Electronics, Warsaw University of Technology, 75 Koszykowa St., 00-662 Warsaw, Poland,

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