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Analysing fault robustness of software applications
Języki publikacji
Abstrakty
W artykule przedstawiono opracowane środowisko do badania wrażliwości aplikacji programowych na błędy sprzętu. Istotą tego środowiska są symulatory błędów pracujące współbieżnie z badanymi aplikacjami w rzeczywistym systemie komputerowym. Wieloletnie doświadczenie pozwoliło zoptymalizować to środowisko oraz ocenić przydatność tego podejścia w praktyce. Dla ilustracji podano przykłady wyników badań dla wielu aplikacji.
In the paper we present fault injection environment, which has been developed in our Institute. This environment is dedicated for the analysis of fault susceptibility in program applications. Faults are simulated in the running application on the real IBM PC compatible system. Many years of our experience resulted in the simulation processes optimization as well as developing efficient testing schemes assuring dependability verifications and improving it. The presented approach is illustrated with some practical results.
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Tom
Strony
373--380
Opis fizyczny
Bibliogr. 15 poz., tab.
Twórcy
Bibliografia
- [1] J. Arlat, et al., Comparison of physical and software implemented fault injection technique. IEEE Trans. on Computers, Vol. 52, No. 8, Sept. 2003, s.115-1133
- [2] Benso, P. Prinetto, Fault injection techniques and tools for embedded systems reliability evaluation, Kluwer Academic Publishers (2003)
- [3] -G. C. Carderilli, F. Kaddur, A. Leanori, M. Ottavi, S. Pontarelli, R. Veliaco, Bit tlip injection in processor based architectures: a case study. Proc. of 6th IEEE On-Line Testing Workshop, 2002, s.117-128
- [4] J. Carreira, H. Madeira, J. G. Silva, Xception: a technique of the experimental evaluation of dependability in modem computers. IEEE Trans. on Software Engineering, Vol. 24, No. 2, February 1998, s.125-136
- [5] P. Cheynet, et al., Experimentally evaluating an automatic approach for generating safety critical software with respect to transient errors. IEEE Transactions on Nuclear Science, Vol. 47, No. 6, December 2000, s.231-236
- [6] P. Civera, et al., Exploiting FPGA based techniques for fault injection campaigns on VLSI circuits. Proc. of IEEE DFT Symposium , 2002, s.250-258
- [7] P. Gawkowski, J. Sosnowski, B. Radko, Analyzing the effectiveness of fault hardening procedures. Proc. of the 11th IEEE Int'l On-Line Testing Symp., 2005, s.14-19
- [8] P. Gawkowski, J. Sosnowski, Software implemented fault detection and fault tolerance mechanisms, Kwartalnik Elektroniki 2005, No. 2 (part l: Concepts and algorithms), s. 291-303, No. 3 (part II: Experimental evaluation of fault coverage), s. 495-508
- [9] R. Leveugle, Fault injection in VHDL description and emulation. Proc. of IEEE DFT Symposium, 2000 s.414-419
- [10] H. Madeira, R. R. Some, Costa, F.D., Rennels, D.: Experimental evaluation of a COTS system for space applications. Proc. of IEEE Int. Conf. on Dependable Systems and Networks, 2002, s. 325-330
- [11] Nicolescu, R. Velazco, M. S. Reorda, Effectiveness and limitations of various software techniques for soft error detection, a comparative study. Proc. of 7th IEEE Int. Testing Workshop, 2001, s. 172-177
- [12] M. Rebaudengo, M. S. Reorda, M. Violante, A new software-based technique for low cost fault tolerant application. Proc. of Annual Reliability and Maintainability Symp. (2003) 25-28
- [13] J. Sosnowski, P. Gawkowski, A. Lesiak, Software implemented fault inserters. Proc. of IFAC PDS2003 Workshop, Pergamon, 2003, s. 293-298
- [14] J. Sosnowski, P. Gawkowski, P. Zygulski, A. Tymoczko, Enhancing fault injection testbench, Proc. of Int. Conf. DeCoS - RELCOMEX, 2006, IEEE Computer Society, 2006, s. 76-83
- [15] Microsoft MSDN Library, http://msdn.microsoft.com/library/
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Bibliografia
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bwmeta1.element.baztech-article-BPG5-0029-0041