IDD Current Monitoring Cell for VLSI Systems - Project, Fabrication and Verification

• Autorzy: Dziurdzia P. , Brzozowski I. , Bratek P. , Kos A.
• Języki publikacji: EN

Abstrakty

EN

The work presents an ASIC (Application Specific Integrated Circuit) CMOS cell for IDD current monitoring in VLSI circuits. The cell is to be used in estimation of dissipated power in high density power microstructures. It can be also useful in fault diagnosis in integrated VLSI circuits. The cell is intended to be placed along with a microstructure requiring cooling on the same piece of silicon and its main objective is to control an active heat sink. A design of the IDD current sensor, a physical layout as well as results of simulations are presented. Finally, the post-fabrication testing measurements are included.

Słowa kluczowe

EN

IDD current monitoring; VLSI; ASICs; fault diagnosis; active cooling; microstructures

• Wydawca: Polska Akademia Nauk, Wydział IV Nauk Technicznych
• Czasopismo: Bulletin of the Polish Academy of Sciences. Technical Sciences
• Rocznik: 2003
• Tom: Vol. 51, nr 1
• Strony: 25--30
• Opis fizyczny: 5 rys., 1 tabela, bibliogr. 9 poz.

Twórcy

autor

Dziurdzia P.

• Institute of Electronics, University of Mining and Metallurgy, al. Mickiewicza 30, 30-059 Cracow, Poland (Instytut Elektroniki AGH)

autor

Brzozowski I.

• Institute of Electronics, University of Mining and Metallurgy, al. Mickiewicza 30, 30-059 Cracow, Poland (Instytut Elektroniki AGH)

autor

Bratek P.

• Institute of Electronics, University of Mining and Metallurgy, al. Mickiewicza 30, 30-059 Cracow, Poland (Instytut Elektroniki AGH)

autor

Kos A.

• Institute of Electronics, University of Mining and Metallurgy, al. Mickiewicza 30, 30-059 Cracow, Poland (Instytut Elektroniki AGH)

Bibliografia

• [1] Kuen-Jong Lee, M. A. Breuer, Design and test rules for CMOS circuits to facilitate IDDQ testing of bridging faults, Transactions on Computer-Aided Design, 11 5, (May 1992).
• [2] C. G. Knight, A. D. Singh, V. P, Nelson, An IDDQ sensor for concurrent timing error detection, IEEE Journal of Solid-State Circuits, 33 10, (October 1998).
• [3] M. Svajda, B. Straka, H. Manhaeve, A monolithic off-chip Iddq monitor, Proc. of ED&TC ’97, Paris (1997) 629.
• [4] J. B. Kim, S. J. Hong, J. Kim, Design of a built - in current sensor for IDDQ testing, IEEE Journal of Solid State Circuits, 33, 8, (August 1998).
• [5] P. Bratek, P. Dziurdzia, A. Kos, New method of active heat sinks control, Proc. of. the 5-th International Conference MIXDES, Łódź, (Jun. 18-20 1998) 195-198.
• [6] P. Dziurdzia, A. Kos, Current sensor for active heat sink control, Proc. of the XXIInd National Conference on Circuit Theory and Electronic Networks, Warszawa-Stare Jabłonki, (October 20-23, 1999) 349-354.
• [7] ALCATEL MIETEC, Electrical parameters CMOS 0.7μm,
• [8] W. Koźmiński, W. Kuźmicz, Uncle, universal layout editor for apple macintosh computers, Users Manual, Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, 1996.
• [9] A. Wojtasik, M. Niewczas, W. Kuźmicz, Excess, a flexible IC circuit extractor, Users Manual, Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, 1996.