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DC and low-frequency noise analysis for buried SiGe channel metamorphic PMOSFETs with high Ge content

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Języki publikacji
EN
Abstrakty
EN
Measurements of current drive in p-Si1-xGex MOSFETs, with x = 0.7, 0.8 reveal an enhancement ratio of over 2 times as compared to a Si device at an effective channel length of 0.55 žm. They also show a lower knee voltage in the output I-V characteristics while retaining similar values of drain induced barrier lowering, subthreshold swing, and off current for devices with a Sb punch-through stopper. For the first time, we have quantitatively explained the low-frequency noise reduction in metamorphic, high Ge content, SiGe PMOSFETs compared to Si PMOSFETs.
Słowa kluczowe
Rocznik
Tom
Strony
101--111
Opis fizyczny
Bibliogr. 20 poz., il.
Twórcy
autor
  • Department of Physics, University of Warwick, Coventry CV4 7AL, United Kingdom
  • Department of Physics University of Warwick Coventry CV4 7AL, United Kingdom
autor
  • Department of Physics University of Warwick Coventry CV4 7AL, United Kingdom
autor
  • Department of Physics University of Warwick Coventry CV4 7AL, United Kingdom
autor
  • DaimlerChrysler Research Center Wilhelm-Runge Str. 11 D-89081 Ulm, Germany
autor
  • Siemens AG Lise-Meitner-Str. 5 D-89081 Ulm, Germany
autor
  • DaimlerChrysler Research Center Wilhelm-Runge Str. 11 D-89081 Ulm, Germany
autor
  • DaimlerChrysler Research Center Wilhelm-Runge Str. 11 D-89081 Ulm, Germany
  • INFM and L-NESS Dipartmento di Fisica Politecnico di Milano via Anzani 52 I-22100 Como, Italy
Bibliografia
  • [1] K. Rim et al., „Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs", in Symp. VLSI Technol., Honolulu, USA, 2002, pp. 98-99.
  • [2] S. Thompson et al., „A 90 nm logic technology featuring 50 nm strained silicon channel transistors", IEDM, p. 50, 2002.
  • [3] A. Sadek, K. Ismail, M. A. Armstrong, D. A. Antoniadis, and F. Stern, „Design of Si/SiGe heterojunction complementary metal-oxide-semiconductor transistors", IEEE Trans. Electron Dev., vol. 43, no. 8, pp. 1224-1232, 1996.
  • [4] N. Sugii, D. Hisamoto, K. Washio, N. Yokoyama, and S. Kimura, „Performance enhancement of strained-Si MOSFETs fabricated on a chemical-mechanical-polished SiGe substrate", IEEE Trans. Electron Dev., vol. 49, no. 12, pp. 2237-2243, 2002.
  • [5] G. Höck, E. Kohn, C. Rosenblad, H. von Känel, H.-J. Herzog, and U. König, „High hole mobility in Si0:17Ge0:83 channel metal-oxidesemiconductor field-effect transistors grown by plasma-enhanced chemical vapor deposition", Appl. Phys. Lett., vol. 76, no. 26, pp. 3920-3922, 2000.
  • [6] C. W. Leitz, M. T. Currie, M. L. Lee, Z.-Y. Cheng, D. A. Antoniadis, and E. A. Fitzgerald, „Hall mobility enhancement in strained Si/Si1-yGey p-type metal-oxide-semiconductor field-effect transistors grown on relaxed Si1-xGex (x < y) virtual substrates", Appl. Phys. Lett., vol. 79, no. 25, pp. 4246-4248, 2001.
  • [7] M. Myronov, P. J. Phillips, T. E. Whall, and E. H. C Parker, „Hall mobility enhancement caused by annealing of Si0:2Ge0:8/Si0:7Ge0:3/Si(001) p-type modulation-doped heterostructures", Appl. Phys. Lett., vol. 80, pp. 3557-3559, 2002.
  • [8] T. Koster, J. Stein, B. Hadam, J. Gondermann, B. Spangenberg, H. G. Roskos, H. Kurz, M. Holzmann, M. Riedinger, and G. Abstreiter, „Fabrication and characterisation of SiGe based in-plane-gate transistors", Microelectron. Eng., vol. 35, no. 1-4, pp. 301-304, 1997.
  • [9] S. Takagi, A. Toriumi, M. Iwase, and H. Tango, „On the universality of inversion layer mobility in Si MOSFET's: Part I - Effects of substrate impurity concentration", IEEE Trans. Electron Dev., vol. 41, pp. 2351-2356, 1994.
  • [10] S. Cristoloveanu, „Silicon on insulator technologies and devices: from present to future", Solid-State Electron., vol. 45, pp. 1403-1411, 2001.
  • [11] D. K. Schroder, Semiconductor Material and Device Characterization. 2nd ed. Wiley, 1998, pp. 540-547.
  • [12] G. Ghibaudo and J. Chroboczek, „On the origin of the LF noise in Si/Ge MOSFETs", Solid-State Electron., vol. 46, pp. 393-398, 2002.
  • [13] A. D. Lambert, B. Alderman, R. J. P. Lander, E. H. C. Parker, and T. E. Whall, „Low frequency noise measurements of p-channel Si1-xGex MOSFET's", IEEE Trans. Electron Dev., vol. 46, pp. 1484-1486, 1999.
  • [14] S. Okhonin, M. A. Py, B. Georgescu, H. Fisher, and L. Risch, „DC and low-frequency noise characteristics of SiGe p-channel FET's designed for 0.13-mm technology", IEEE Trans. Electron Dev., vol. 46, pp. 1514-1517, 1999.
  • [15] A. Asai, J. S. Iwanaga, A. Inoue, Y. Hara, Y. Kanzawa, H. Sorada, T. Kawashima, T. Ohnishi, T. Takagi, and M. Kubo, „Low-frequency noise characteristics in SiGe channel heterostructure dynamic threshold PMOSFET (HDTMOS)", IEDM Tech. Dig., pp. 35-38, 2002.
  • [16] T. Tsuchiya, T. Matsuura, and J. Murota, „Low-frequency noise in Si1-xGex p-channel metal oxide semiconductor field-effect transistors", Jpn. J. Appl. Phys., vol. 40, pp. 5290-5293, 2001.
  • [17] G. Ghibaudo and T. Boutchcha, „Electrical noise and RTS fluctuations in advanced CMOS devices", Microelectron. Reliab., vol. 42, pp. 573-582, 2002.
  • [18] M. Glück, J. Hersener, H. G. Umbach, J. Rappich, and J. Stein, „Implementation of low thermal budget techniques to Si and SiGe MOSFET device processing", Solid-State Phen., vol. 57-58, p. 413, 1997.
  • [19] K. Terada and H. Muta, „A new method to determine effective MOSFET channel length", Jpn. J. Appl. Phys., vol. 18, p. 953, 1979.
  • [20] M. M. Jevtic, Z. Stanimirovic, and I. Stanimirovic, „Evaluation of thick-film resistor structural parameters based on noise index measurements", Microelectron. Reliab., vol. 41, p. 59, 2001.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BAT3-0022-0016
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