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TSSOI as an efficient tool for diagnostics of SOI technology in Institute of Electron Technology

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Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
This paper reports a test structure for characterization of a new technology combining a standard CMOS process with pixel detector manufacturing technique. These processes are combined on a single thick-_lm SOI wafer. Preliminary results of the measurements performed on both MOS SOI transistors and dedicated SOI test structures are described in detail.
Słowa kluczowe
Rocznik
Tom
Strony
85--93
Opis fizyczny
Bibliogr. 6 poz., il.
Twórcy
autor
  • AGH University of Science and Technology, A. Mickiewicza st 30, 30-059 Kraków, Poland
autor
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
autor
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
autor
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
autor
  • AGH University of Science and Technology, A. Mickiewicza st 30, 30-059 Kraków, Poland
autor
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
autor
  • AGH University of Science and Technology A. Mickiewicza st 30 30-059 Kraków, Poland
autor
  • AGH University of Science and Technology A. Mickiewicza st 30 30-059 Kraków, Poland
  • Institute of Electron Technology Lotników av. 32/46 02-668 Warsaw, Poland
Bibliografia
  • [1] M. Caccia et al., "Silicon ultra fast cameras for electron and gamma sources in medical applications", in 8th Top. Sem. Innov. Part. Radiat. Detec., Siena, Italy, 2002 (Nucl. Phys. B { Proc. Suppl., vol. 125, pp. 133-138, 2003).
  • [2] J. Marczewski et al., "Monolithic silicon pixel detectors in SOI technology", in Lin. Coll. Worksh., Prague, Czech Republic, 2002, http://hep2.fzu.cz/ecfadesy/Talks/ Vertex Detector.
  • [3] H. Niemiec et al., "Technology development for silicon monolithic pixel sensor in SOI technology", in 10th Int. Conf. MIXDES, Łódź, Poland, 2003, pp. 508-511.
  • [4] D. Tomaszewski et al., "A versatile tool for MOSFETs parameters extraction", in 6th Symp. Diagn. & Yield, Warsaw, Poland, 2003.
  • [5] M. Sadowski and D. Tomaszewski, "An effcient approach to the measurement and characterization of MOSFETs capacitances", Microelectron. Reliab., vol. 40, pp. 1045{1049, 2000.
  • [6] J. Zając et al. "Semi-automatic test system for characterisation of ASIC/MPWs", in 6th Symp. Diagn. & Yield, Warsaw, Poland, 2003.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-article-BAT3-0022-0013
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