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Recent developments in Qucs-s Equation-Defined modelling of semiconductor devices and IC’s

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EN
Abstrakty
EN
The Qucs Equation-Defined Device was introduce roughly ten years ago as a versatile behavioural simulation component for modelling the non-linear static and dynamic properties of passive components, semiconductor devices and IC macromodels. Today, this component has become an established element for building experimental device simulation models. It’s inherent interactive properties make it ideal for device and circuit modelling via Qucs schematics. Moreover, Equation-Defined Devices often promote a clearer understanding of the factors involved in the construction of complex compact semiconductor simulation models. This paper is concerned with recent advances in Qucs-S/Ngspice/XSPICE modelling capabilities that improve model construction and simulation run time performance of Equation-Defined Devices using XSPICE model syntheses. To illustrate the new Qucs-S modelling techniques an XSPICE version of the EPFL EKV v2.6 long channel transistor model together with other illustrative examples are described and their performance simulated with Qucs-S and Ngspice.
Twórcy
autor
  • Centre for Communications Technology, London Metropolitan University, UK
autor
  • Department of Electronic Engineering, Bauman Moscow State Technical University, Kaluga branch, Russia
Bibliografia
  • [1] S. Jahn, and M.E. Brinson, “Interactive Compact Modeling Using Qucs Equation-Defined Devices”, Int. J. Numer. Model. 2008, vol 21, pp. 335-349.
  • [2] M. Brinson, and S. Jahn,“Qucs: A GPL software package for simulation, compact device modelling and circuit macromodelling from DC to RF and beyond”, Int. J. Numer. Model. 2009, vol 22, pp. 297-319-349.
  • [3] Accellera, ”Verilog-AMS Language Manual”, Version 2.3.1, 2009. [Online] Available: http://www.accellera.org.
  • [4] M. E. Brinson, ”SPICE to QucsStudio via Qucs: An international attempt to develop a freely available GPL RF design, compact modeling, simulation, data processing and manufacturing development environment for engineers”, MOS-AK/GSA Workshop, March 16-18, 2012, India. [Online] Available: http://www.mosak.org/india/presentations/Brinson MOS-AK India12.pdf.
  • [5] L. Lemaitre and B.Gu, ”ADMS- a fully customizable Verilog-AMS compiler approach,” MOS-AK, Meeting, Montreux, 2006, [Online] Available: http://www.mosak.org/montreux/posters/17 Lemaitre MOS AK06.pdf.
  • [6] P Nenzi and H. Vogt, ”Ngspice-26 (Next generation SPICE version 26), 2015. [Online] Available: http://ngspice.sourceforge.net.
  • [7] Sandia National Laboratories US., ”Xyce parallel electronic simulator version 6.4,” 2016, [Online] Available: http://xyce.sania.gov.
  • [8] M. Bucher, C. Lallememt, C. Enz. F Theodoloz and F. Krummencher, ”The EPFL-ELV MOSFET Model Equations for Simulation”, Technical Report, Electronics Laboratories, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland, Model Version 2.6, June 1997.
Uwagi
Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).
Typ dokumentu
Bibliografia
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bwmeta1.element.baztech-ac06644d-0cc5-45c0-b202-ef1c660233e0
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