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A High-Speed Fully Digital Phase-Synchronizer Implemented in a Field Programmable Gate Array Device

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Języki publikacji
EN
Abstrakty
EN
Most systems used in quantum physics experiments require the efficient and simultaneous recording different multi-photon coincidence detection events. In such experiments, the single-photon gated counting systems can be applicable. The main sources of errors in these systems are both instability of the clock source and their imperfect synchronization with the excitation source. Below, we propose a solution for improvement of the metrological parameters of such measuring systems. Thus, we designed a novel integrated circuit dedicated to registration of signals from a photon number resolving detectors including a phase synchronizer module. This paper presents the architecture of a high-resolution (~60 ps) digital phase synchronizer module cooperating with a multi-channel coincidence counter. The main characteristic feature of the presented system is its ability to fast synchronization (requiring only one clock period) with the measuring process. Therefore, it is designed to work with various excitation sources of a very wide frequency range. Implementation of the phase synchronizer module in an FPGA device enabled to reduce the synchronization error value from 2.857 ns to 214.8 ps.
Rocznik
Strony
537--550
Opis fizyczny
Bibliogr. 39 poz., rys., wykr., wzory
Twórcy
  • Nicolaus Copernicus University, Faculty of Physics, Astronomy and Informatics, Grudziądzka 5, 87-100 Toruń, Poland
autor
  • Nicolaus Copernicus University, Faculty of Physics, Astronomy and Informatics, Grudziądzka 5, 87-100 Toruń, Poland
autor
  • Nicolaus Copernicus University, Faculty of Physics, Astronomy and Informatics, Grudziądzka 5, 87-100 Toruń, Poland
  • Nicolaus Copernicus University, Faculty of Physics, Astronomy and Informatics, Grudziądzka 5, 87-100 Toruń, Poland
Bibliografia
  • [1] Wasilewski, W., Kolenderski, P., Frankowski, R. (2007). Spectral density matrix of a single photon measured. Phys. Rev. Lett., 99, 123601.
  • [2] Gisin, N., Ribordy, G., Tittel, W., Zbinden, H. (2002). Quantum cryptography. Reviews of Modern Physics, 74(1), 145-195.
  • [3] Wu, L., Chen, Y. (2015). Three-Stage Quantum Cryptography Protocol under Collective-Rotation Noise. Entropy, 17(5), 2919-2931.
  • [4] Pirandola, S., Eisert, J., Weedbrook, Ch., Furusawa, A., Braunstein, S.L. (2015). Advances in Quantum Teleportation. Nature Photonics, 9, 641-652.
  • [5] Wasilewski, W., Radzewicz, Cz., Frankowski, R., Banaszek, K. (2008). Statistics of multiphoton events in spontaneous parametric down-conversion. Phys. Rev. A, 78, 033831.
  • [6] Achilles, D., Silberhorn, Ch., Sliwa, C., Banaszek, K., Walmsley, I.A. (2003). Fiber-assisted detection with photon number resolution. Optics Letters, 28(23), 2387-2389.
  • [7] Zieliński, M., Karasek, K., Płóciennik, P., Dygdała, R. (1996). Digital Gated Single-Particle Counting Systems, design and applications. Metrologia i Systemy Pomiarowe, 3(3-4), 199-211.
  • [8] Simms, P.C. (1961). Fast coincidence system based on a transistorized time-to-amplitude converter. Rev. Sci. Instrum., 32(8), 894-898.
  • [9] Gaertner, S., Weinfurter, H., Kurtsiefer, C. (2005). Fast and compact multichannel photon coincidence unit for quantum information processing. Rev. Sci. Instrum., 76, 123108.
  • [10] Frankowski, R., Wasilewski, W., Kowalski, M., Zieliński, M. (2008). High resolution two channel Box-Car system implemented in single FPGA structure Virtex4 for apply in quantum physics. Elektronika, 49(5), 21-23.
  • [11] Zhu, F., Hsieh, S.C., Yen, W.W., Chou, H.P. (2011). A digital coincidence measurement system using FPGA techniques. Nuclear Instruments and Methods in Physics Research Section A, 652(1), 454-457.
  • [12] Antonioli, S., Miari, L., Cuccato, A., Crotti, M., Rech, I., Ghioni, M. (2013). 8-Channel acquisition system for Time-Correlated Single-Photon Counting. Rev. Sci. Instrum., 84, 064705.
  • [13] Park, B.K., Kim, Y.S., Kwon, O., Han, S.W., Moon, S. (2015). High-performance reconfigurable coincidence counting unit based on a field programmable gate array. Applied Optics, 54(15), 4727-4731.
  • [14] Zieliński, M., Kowalski, M., Frankowski, R., Chaberski, D., Grzelak, S., Wydźgowski, L. (2009). Accumulated jitter measurement of standard clock oscillators. Metrol. Meas. Syst., 16(2), 259-266.
  • [15] Zieliński, M. (2000). Digital Gated Single-Particle Counting System, The Errors Analysis. IEEE Trans. on Instrum. and Measurement., 49(5), 1069-1076.
  • [16] Tonietto, R., Zuffetti, E., Castello, R., Bietti, I. (2006). A 3MHz Bandwidth Low Noise RF All Digital PLL with 12ps Resolution Time to Digital Converter. Solid-State Circuits Conference, ESSCIRC, 150-153.
  • [17] Santos, D.M., Dow, S.F., Flasck, J.M., Levi, M.E. (1996). A CMOS Delay Locked Loop and Sub-Nanosecond Time-to-Digital Converter Chip. IEEE Transactions on Nuclear Science, 43(3), 289-291.
  • [18] Derogarian, F., Canas, J., Grade, V.M. (2014). A Time Synchronization Circuit with an Average 4.6 ns One-Hop Skew for Wired Wearable Networks. 17th Euromicro Conference on Digital System Design (DSD 2014), 146-153.
  • [19] Buevich, M., Rajagopal, N., Rowe, A. (2014). Hardware Assisted Clock Synchronization for Real-Time Sensor Networks. Real-Time Systems Symposium (RTSS), 268-277.
  • [20] Chu, D.C. (1978). The triggered phase-locked oscillator. Hewlett-Packard J., 8-9.
  • [21] Dudek, P., Szczepański, S., Hatfield, J.H. (2000). A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line. IEEE Trans. Solid-State Circuits, 35(2), 240-247.
  • [22] Johnson, M.G., Hudson, E.L. (1988). A Variable Delay Line PLL for CPU – Coprocessor Synchronization. IEEE Journal of Solid-State Circuits, 23(5), 1218-1223.
  • [23] Kim, H., Kim, S.Y., Lee, K.Y. (2013). A low power small area cyclic time-to-digital converter in all-digital PLL for DVB-S2 application. Journal of Semiconductor Technology and Science, 13(2), 145-151.
  • [24] Szplet, R. (2009). Auto-tuned counter synchronization in FPGA-based interpolation time digitisers. Electronics Letters, 45(13), 671-672.
  • [25] Jansson, J.P., Mäntyniemi, A., Kostamovaara, J. (2009). Synchronization in a Multi-level CMOS Time-to-Digital Converter. IEEE Transactions on Circuits and Systems, 56(8), 1622-1634.
  • [26] Rehacek, J., Hradil, Z., Haderka, O., Perina, J. Jr., Hamar, M. (2003). Multiple-photon resolving fiber-loop detector. Physical Review. A, 67(6), 061801.
  • [27] Dygdała, R., Fuso, F., Arimondo, E., Zieliński, M. (1995). Modular digital box-car for applications in pulsed laser spectroscopy. Rev. Sci. Instrum., 66(6), 3507-3512.
  • [28] Frankowski, R., Kowalski, M., Zieliński, M. (2011). The phase fluctuations of the clock signal generated in the digital frequency synthesis process. Electrical Review, 87(9a), 95-100.
  • [29] Product specification. (2006). Xilinx Corp. User Guide for EDK: ML40x EDK Processor Reference Design, UG082 (v5.0).
  • [30] Zieliński, M. (2009). Review of single-stage time-interval measurement modules implemented in FPGA devices. Metrol. Meas. Syst., 16(4), 641-647.
  • [31] Wu, J. (2010). Several key issues on implementing delay line based TDCs using FPGAs. IEEE Trans. Nucl. Sci., 57(3), 1543-1548.
  • [32] Szplet, R., Jachna, Z., Kwiatkowski, P., Rożyc, K. (2013). A 2.9 ps equivalent resolution interpolating time counter based on multiple independent coding lines. Measurement Science and Technology, 24(3), 35904-15.
  • [33] Chaberski, D. (2016). Time-to-digital-converter based on multiple-tapped-delay-line. Measurement, 89, 87-96.
  • [34] Frankowski, R., Gurski, M., Płóciennik, P. (2016). Optical methods of the delay cells characteristics measurements and their applications. Optical and Quantum Electronics, 48(3), 1-19.
  • [35] Mota, M., Christiansen, J. (1999). A high-resolution time interpolator based on a delay locked loop and an R-C delay line. IEEE J. Solid State Circuits, 34(10), 1360-1366.
  • [36] Product specification. (2006). Xilinx Corp. User Guide: ML401/ML402/ML403 Evaluation Platform, UG080 (v2.5).
  • [37] Cova, S., Bertolaccini, M. (1970). Differential linearity testing and precision calibration of multichannel time sorters. Nuclear Instruments and Methods, 77(2), 269-276.
  • [38] Frankowski, R., Chaberski, D., Kowalski, M. (2015). An optical method for the time-to-digital converters characterization. Proc. IEEE ICTON 2015, Budapest, Hungary, paper We.P.14, 1-4.
  • [39] Forsythe, G.E. (1972). Von Neumann's Comparison Method for Random Sampling from the Normal and Other Distributions. Mathematics of Computation, 26(120), 817-826.
Uwagi
PL
Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę (zadania 2017).
Typ dokumentu
Bibliografia
Identyfikator YADDA
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