Kintex ultrascale’s multi-segment digital tapped delay lines with controlled characteristics for precise time-to-digital conversion

• Autorzy: Frankowski Robert , Gurski Maciej , Szplet Ryszard

Identyfikatory

DOI

10.24425/mms.2024.149697

• Języki publikacji: EN

Abstrakty

EN

This paper describes an efficient method of designing and implementing in FPGA devices complex tapped delay lines (CTDL) with pico and sub-picosecond resolution. Achieving a higher resolution and better linearity is possible by appropriate selection of single time coding tapped delay lines (TDL) involved in creation of CDTL. The proposed TDL selection algorithm significantly optimizes the size of the device’s logical resources required to implement CDTL with assumed parameters and provides a proper selection scenario. Ultimately, the presented solution allows to create CTDLs with different user-defined configurations based on a fixed set of available logical resources. Therefore, it is particularly recommended for prototyping in smaller FPGA devices. In this work, we investigate how the order of line selection influences the increase of the multiple time coding lines resolution. Furthermore, we determine the relation between the equivalent resolution value and the number of TDLs involved. Obtained results allow to estimate the upper limit of resolution that can be achieved using a given technology. In addition, the ranges of resolutions achievable with a fixed number of lines is also examined. The presented research results have been performed on a Kintex UltraScale FPGA chip, manufactured by Xilinx in the 20-nm CMOS process.

Słowa kluczowe

EN

delay line; precise time metrology; time to digital converter; field programmable gate arrays

• Wydawca: Komitet Metrologii i Aparatury Naukowej PAN
• Czasopismo: Metrology and Measurement Systems
• Rocznik: 2024
• Tom: Vol. 31, nr 2
• Strony: 417--429
• Opis fizyczny: Bibliogr. 25 poz., rys., tab., wykr., wzory

Twórcy

autor

Frankowski Robert

• Institute of Engineering and Technology, Faculty of Physics, Astronomy and Informatics, Nicolaus Copernicus University in Toruń, ul. Grudziądzka 5, 87-100 Toruń, Poland

autor

Gurski Maciej

• Institute of Engineering and Technology, Faculty of Physics, Astronomy and Informatics, Nicolaus Copernicus University in Toruń, ul. Grudziądzka 5, 87-100 Toruń, Poland

autor

Szplet Ryszard

• Faculty of Electronics, Military University of Technology, ul. Kaliskiego 2, 00-908, Warsaw, Poland

Bibliografia

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Uwagi

This research was funded in part by the National Science Centre, Poland, Grant No. 2021/05/X/ST7/00730.