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Low ripple current mode charge pumps with parasitics precharge

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Języki publikacji
EN
Abstrakty
EN
In this paper a novel current mode charge pump architecture is shown and discussed. The presented DC-DC voltage converter uses extremely low filtering capacitance while still maintaining a low ripple amplitude of the output voltage. The proposed architecture is silicon proven in CMOS 130 nm technology. The power efficiency and layout area trade-offs of the proposed architecture are considered also.
Twórcy
  • Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, Poland
  • Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, Poland
Bibliografia
  • [1] J.Y. Sim, et al., “A 1.0 V 256 Mb SDRAM with offset-compensated direct sensing and charge-recycled precharge schemes,” 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC., pp. 310-495, vol.1, Feb. 2003.
  • [2] K. Sawada, Y. Sugawara, S. Masui, “An On-Chip High-Voltage Generator Circuit for EEPROMs with a Power Supply Voltage below2V,” Symposium on VLSI Circuits, Digest of Technical Papers, 1995, pp. 75-76.
  • [3] M. Innocent, P. Wambacq, S. Donnay, W. Sansen and H. De Man, “Alinear high voltage charge pump for MEMs applications in 0.18/spl mu/m CMOS technology”, ESSCIRC 2003 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), Estoril, Portugal, 2003, pp. 457-460.
  • [4] J. Hailong, N. Weining, S. Yin, F.F. Dai, “A Novel DC-DC Charge Pump Circuit for Passive RFID Transponder,” Proceeding of 2007 International Workshop on Electron Devices and Semiconductor Technology, 2007. EDST 2007., pp. 218-221, June 2007.
  • [5] X. Wu et al., “A 20-pW Discontinuous Switched-Capacitor Energy Harvester for Smart Sensor Applications,” IEEE Journal of Solid-State Circuits, vol. 52, no. 4, pp. 972-984, April 2017.
  • [6] A. Grodzicki, “Fully integrated low ripple charge pump voltage converter design method in nanometer CMOS technologies,” original title: “Metoda projektowania zintegrowanych pomp ładunkowych o małej amplitudzie tętnień w nanometrowych technologiach CMOS”, PhD dissertation defended at Warsaw Uniwersity of Technology, Poland, April 2016.
  • [7] D. Ma, “Robust Multiple-Phase Switched-Capacitor DC-DC, Converter with Digital Interleaving Regulation Scheme,” ISLPED’06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design, Tegernsee, 2006, pp. 400-405.
  • [8] Y. Lu, J. Jiang, W. Ki, “A Multiphase Switched-Capacitor DC-DC Converter Ring With Fast Transient Response and Small Ripple,” IEEE Journal of Solid-State Circuits, vol. 52, no. 2, pp. 579-591, Feb. 2017.
  • [9] Z. Luo, M. Ker, W. Cheng, T. Yen, “Regulated Charge Pump With New Clocking Scheme for Smoothing the Charging Current in Low Voltage CMOS Process,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 3, pp. 528-536, March 2017.
  • [10] S. Kennedy, M. R. Yuce and J. Redoute, “A Low-EMI Fully Integrated Switched-Capacitor DC/DC Converter,” IEEE Transactions on Electromagnetic Compatibility, vol. 60, no. 1, pp. 225-233, Feb. 2018.
  • [11] A. Grodzicki, “Switched capacitor low noise voltage converter design strategies in 90 nm CMOS process,” Proceedings of the 19th International Conference: “Mixed Design of Integrated Circuits and Systems” – MIXDES 2012, pp. 570-573, Warsaw, May 2012.
  • [12] G. Thiele, E. Bayer, “Current mode charge pump: topology, modeling and control,” 2004 IEEE 35th Annual Power Electronics Specialists Conference, 2004. PESC 04., vol.5, pp. 3812-3817, June 2004.
  • [13] H. Lee, P.K.T. Mok, “An SC Voltage Doubler with Pseudo-Continuous Output Regulation Using a Three-Stage Switchable Opamp,” IEEE Journal of Solid-State Circuits, vol. 42, no. 6, pp. 1216-1229, June 2007.
  • [14] T. Das, P. Mandal, “Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple,” 2009 22nd International Conference on VLSI Design, pp. 181-186, Jan.2009.
  • [15] R. T. Burt, H. Zhang, T. L. Botker, V.V. Ivanov, USP6794923 “Low ripple charge pump for charging parasitic capacitances”, (2004).
  • [16] A. Grodzicki, W. A. Pleskacz: “Low noise charge pump,” Proceedings of SPIE – Electron Technology Conference 2013, vol. 8902, pp. 890207-1-8, July 2013. ISBN: 978-0-8194-9521-1. http://dx.doi.org/10.1117/12.2029759.
  • [17] A. Grodzicki, W. A. Pleskacz: “A low ripple current mode voltage doubler,” Proceedings of the 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - DDECS, pp. 63-68, Belgrade, April 2015.
  • [18] A. Grodzicki, W. A. Pleskacz: “Multistage Low Ripple Charge Pump,” Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - DDECS, pp. 93-98, Warsaw, April 2014.
  • [19] A. Grodzicki, W. Pleskacz: “Layout of integrated charge pump for voltage conversion from 1.2V to 1.5V”, original title: „Zintegrowana pompa ładunkowa do konwersji napięcia 1,2 V na 1,5 V”, Polish Patent Office, application S-0022, date 06-09-2016, approved and protected since 19-12-2016.
  • [20] F. Z. Neto, W. L. Tercariol, USP8462578B2: “Charge pump circuit with fast start-up,” (2013).
Typ dokumentu
Bibliografia
Identyfikator YADDA
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