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Implementation of symmetric block ciphers in popular-grade FPGA devices

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Języki publikacji
EN
Abstrakty
EN
In this paper we discuss hardware implementations of the two best ciphers in the AES contest – the winner Rijndael and the Serpent – in low-cost, popular Field-Programmable Gate Arrays (FPGA). After presenting the elementary operations of the ciphers and organization of their processing flows we concentrate on specific issues of their implementations in two selected families of popular-grade FPGA devices from Xilinx: currently the most common Spartan-6 and its direct predecessor Spartan-3. The discussion concentrates on differences in resources offered by these two families and on efficient implementation of the elementary transformations of the two ciphers. For case studies we propose a selection of different architectures (combinational, pipelined and iterative) for the encoding units and, after their implementation, we compare size requirements and performance parameters of the two ciphers across different architectures and on different FPGA platforms.
Rocznik
Strony
179--188
Opis fizyczny
Bibliogr. 19 poz., tab.
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autor
  • Wrocław University of Technology, Wrocław, Poland
Bibliografia
  • [1] Anderson, R., Biham, E. & Knudsen, L. (1998). Serpent: A Proposal for the Advanced Encryption Standard. Proc. First Advanced Encryption Standard (AES) Candidate Conf. Ventura, California, http://www.cl.cam.ac.uk/~rja14/ serpent.html (accessed April 2012).
  • [2] Anderson, R., Biham, E. & Knudsen, L. (2000). Serpent and Smartcards. Smart Card Research and Applications. Proc. 3rd International Conf. CARDIS '98. Lecture Notes in Computer Science, 1820.
  • [3] Anderson, R., Biham, E. & Knudsen, L. (2000). The Case for Serpent. Proc. Third AES Candidate Conf. New York, http://csrc.nist.gov/archive/aes/ index.html (accessed April 2012).
  • [4] Chu, P.P. (2006). RTL Hardware Design Using VHDL. John Wiley & Sons, New Jersey.
  • [5] Gaj, K. & Chodowiec, P. (2000). Comparison of the hardware performance of the AES candidates using reconfigurable hardware. Proc. Third AES Candidate Conf. New York, http://csrc.nist.gov/ archive/aes/index.html (accessed April 2012).
  • [6] Krukowski, Ł. & Sugier, J. (2010). Designing AES cryptographic unit for automatic implementation in low-cost FPGA devices. Int. J. Critical Computer Based Systems, 1, 104-116.
  • [7] Lázaro, J., Astarloa, A., Arias, J., Bidarte, U. & Cuadrado, C. (2004). High Throughput Serpent Encryption Implementation. Field Programmable Logic and Application, Lecture Notes in Computer Science, 3203.
  • [8] Liberatori, M., Otero, F., Bonadero, J.C. & Castineira, J. (2007). AES-128 Cipher. High Speed, Low Cost FPGA Implementation. Proc. Third Southern Conf. on Programmable Logic. Mar del Plata, Argentina, IEEE Comp. Soc. Press.
  • [9] Mroczkowski, P. (2000). Implementation of the block cipher Rijndael using Altera FPGA. Military University of Technology, Warsaw.
  • [10] National Institute of Standards and Technology (2001). Specification for the ADVANCED ENCRYPTION STANDARD (AES). Federal Information Processing Standards Publication 197. http://csrc.nist.gov/publications/PubsFIPS .html (accessed April 2012).
  • [11] Osvik, D.A. (2000). Speeding up Serpent. Proc. Third AES Candidate Conf. New York, http://csrc.nist.gov/archive/aes/index.html (accessed April 2012).
  • [12] Piwko, K. (2010). Hardware implementation of cryptographic algorithms in programmable logic devices. Dissertation for M.Sc. degree, Wrocław University of Technology, Faculty of Electronics.
  • [13] RSA Laboratories (1997-99). DES Challenges. http:// www.rsa.com.
  • [14] Sugier, J. (2010). Low-cost hardware implementation of Serpent cipher in programmable devices. Monographs of System Dependability Vol. 3: Technical Approach to Dependability. Publishing House of Wrocław University of Technology, 159-172.
  • [15] Sugier, J. (2011). Implementing Serpent cipher in field programmable gate arrays. 5th International Conf. on Information Technology ICIT 2011 Amman, Jordan, 91-96.
  • [16] Sugier, J. (2012). Implementing AES and Serpent ciphers in new generation of low-cost FPGA devices. Advances in Intelligent and Soft computing Vol. 170: Complex Systems and Dependability. Springer, 273-288.
  • [17] Wójcik, M. (2007). Effective implementation of Serpent algorithm. Dissertation for M.Sc. degree, Faculty of Electronics and Information Technology, Warsaw University of Technology.
  • [18] Xilinx, Inc. (2009). Spartan-3 Family Data Sheet. DS099.PDF, www.xilinx.com (accessed April 2012).
  • [19] Xilinx, Inc. (2011). Spartan-6 Family Overview. DS160.PDF, www.xilinx.com (accessed April 2012).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-a4bd8f1d-98df-4928-9fa7-d31b4f3f1f65
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