A Verification Technique for Multiple Soft Fault Diagnosis of Linear Analog Circuits

• Autorzy: Tadeusiewicz M. , Ossowski M.

Identyfikatory

DOI

10.24425/118150

• Języki publikacji: EN

Abstrakty

EN

The paper deals with multiple soft fault diagnosis of linear analog circuits. A fault verification method is developed that allows estimating the values of a set of the parameters considered as potentially faulty. The method exploits the transmittance of the circuit and is based on a diagnostic test leading to output signal in discrete form. Applying Z-transform a diagnostic equation is written which is next reproduced. The obtained system of equations consisting of larger number of equations than the number of the parameters is solved using appropriate numerical approach. The method is adapted to real circumstances taking into account scattering of the fault-free parameters within their tolerance ranges and some errors produced by the method. In consequence, the results provided by the method have the form of ranges including the values of the tested parameters. To illustrate the method two examples of real electronic circuits are given.

Słowa kluczowe

EN

analog circuits; fault diagnosis; linear circuits; multiple soft fault; verification technique

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2018
• Tom: Vol. 64, No. 1
• Strony: 83--89
• Opis fizyczny: Bibliogr. 32 poz., rys., tab.

Twórcy

autor

Tadeusiewicz M.

• Department of Electrical, Electronic, Computer and Control Engineering, Łódź University of Technology, Poland

autor

Ossowski M.

• Department of Electrical, Electronic, Computer and Control Engineering, Łódź University of Technology, Poland

Bibliografia

• [1] M. Aminian, F. Aminian, “A modular fault-diagnosis system for analog electronic circuits using neural networks with wavelet transform as a preprocessor”, IEEE Trans. Instrum. Meas., vol. 56: pp. 1546-1554, 2007. doi: 10.1109/TIM.2007.904549.
• [2] S. Bhunia, A. Raychowdhury, K. Roy, (2005). Defect oriented testing of analog circuits using wavelet analysis of dynamic supply current. J. Electron Test., 21: 147-159. doi: 10.1007/s10836-005-6144-3.
• [3] M. Catelani, A. Fort, “Soft fault detection and isolation in analog circuits: some results and a comparison between a fuzzy approach and radial basis function networks”, IEEE Trans. Instrum. Measur., vol. 51, pp. 196-202, 2002. doi: 10.1109/19.997811.
• [4] Z. Czaja, R. Zielonko, “On fault diagnosis of analogue electronic circuits based on transformations in multi-dimentional spaces”, Measurement, vol. 35, pp. 293-301, 2004. doi: 10.1016/j.measurement.2003.10.004.
• [5] Z. Czaja, “Using a square-wave signal for fault diagnostic of analog parts of mixed-signal electronic embedded systems”, IEEE Transactions on Instrumentation and Measurements, vol. 57, pp. 1589-1595, 2008. doi: 10.1109/TIM.2008.925342.
• [6] H. Dai, T.M. Souders, “Time-domain testing strategies and fault diagnosis for analog systems”, IEEE Transactions on Instrumentation and Measurements, vol. 19, pp. 157-162, 1990. doi: 10.1109/19.50436.
• [7] Y. Deng, Y. Shi, W. Zhang, “An approach to locate parametric faults in nonlinear analog circuits”, IEEE Trans. Instrum. Meas., vol. 61, pp. 358-367, 2012. doi: 10.1109/TIM.2011.2161930.
• [8] G. Fedi, S. Manetti, M.C. Picirilli, J. Starzyk, “Determination of an optimum set of testable components in the fault diagnosis of analog linear circuits”, IEEE Trans. Circ. Syst.-I., vol. 46, pp 779-787, 1999. doi: 10.1109/81.774222.
• [9] D. Gizopoulos, Advances in electronic testing. Challenges and methodologies. Springer, Dordrecht, 2006.
• [10] F. Grasso, A. Luchetta, S. Manetti, M.C. Piccirilli, “A method for the automatic selection of test frequencies in analog fault diagnosis”, IEEE Trans. Instrum. Measur., vol. 56, pp. 2322-2329, 2007. doi: 10.1109/TIM.2007.907947.
• [11] Z. Guo, J. Savir, (2006) “Coefficient-based test of parametric faults in analog circuits” IEEE Trans. Instr. Measur., vol. 55, pp. 150-157, 2006. doi: 10.1109/TIM.2005.861490.
• [12] M. Jahangiri, F. Razaghian, “Fault detection in analogue circuits using hybrid evolutionary algorithm and neural network”, Analog Int. Cir. Sig. Proc., vol. 80, pp. 551-556, 2014. doi: 10.1007/s10470-014-0352-7.
• [13] P. Kabisatpathy, A. Barua, S. Sinha, Fault diagnosis of analog integrated circuits. Springer, Dordrecht,2005.
• [14] E.W. Kamen, B.S. Heck, Fundamentals of signals and systems using the Web and Matlab. Second Editions. Prentice Hall. Inc., Upper Saddle River, NJ. 07458, 2000.
• [15] B. Long, M. Li, H. Wang, S. Tian, “Diagnostics of analog circuits based on LS_SVM using time-domain features”, Circuits Syst. Signal Process., vol. 32, pp. 2683-2706, 2013. doi: 10.1007/s00034-013-9614-3.
• [16] A. Materka, M. Strzelecki, “Parametric testing of mixed-signal circuits by ANN processing of transient responses”, Journal of Electronic Testing., vol. 9, pp. 187-202, 1996. doi: 10.1007/BF00137574.
• [17] D.K. Papakostas, A.A Hatzopoulos, “A unified procedure for fault detection of analog and mixed-mode circuits using magnitude and phase components of the power supply current spectrum”, IEEE Trans. Instrum. Measur., vol. 57, pp. 2589-2995 2008. doi: 10.1109/TIM.2008.924932.
• [18] M. Peng, C.K. Tse, M. Shen, K. Xie, “Fault diagnosis of analog circuits using systematic tests based on data fusion”, Circuits Systems and Signal Processing, vol. 32, pp. 525-539, 2013. doi: 10.1007/s00034-012-9487-x.
• [19] A, Robotycki, R. Zielonko, “Fault diagnosis of analog piecewise linear circuits based on homotopy”, IEEE Transactions on Instrumentation and Measurements, vol. 51, pp. 867-881, 2002. doi: 10.1109/TIM.2002.803515.
• [20] R. Sałat, S, Osowski, “Support Vector Machine for soft fault location in electrical circuits”, J. Intelligent Fuzzy Systems., vol. 22, pp. 21-31, 2011. doi: 10.3233/IFS-2010-0471.
• [21] S. Sindia, V.D. Agrawal, V. Singh, “Parametric fault testing of non-linear analog circuits based on polynomial and V-transform coefficients”, J. Electron Test., vol. 28, pp. 757-771, 2012. doi: 10.1007/s10836-012-5326-z.
• [22] J. Starzyk, D. Liu, “Multiple fault diagnosis of analog circuits based on large change sensitivity analysis”, in Proceedings of European Conference on Circuit Theory and Design, Finland, August 28-31, 2001, pp. I-241-I-244.
• [23] M. Tadeusiewicz, S. Hałgas, “Global and local parametric diagnosis of analog short-channel CMOS circuits using homotopy-simplicial algorithm”, Int. J. Circ. Theor. Appl., vol. 42, pp. 1051-1068, 2014. doi: 10.1002/cta.1904.
• [24] M. Tadeusiewicz, M. Korzybski, “A method for fault diagnosis in linear electronic circuits”, Int. J. Circ. Theory Appl., vol. 28, pp. 245-262, 2000. doi: 10.1002/(SICI)1097-007X(200005/06)28:3<245::AID-CTA103>3.0.CO;2-X.
• [25] M. Tadeusiewicz, S. Hałgas, “An algorithm for multiple fault diagnosis in analog circuits”, Int. J. Circ. Theory Appl., vol. 34, pp. 607-615, 2006. doi: 10.1002/cta.374.
• [26] M. Tadeusiewicz, S. Hałgas, M. Korzybski, „An algorithm for soft-fault diagnosis of linear and nonlinear circuits”, IEEE Trans. Circ. Syst.-I., vol. 49, pp. 1648-1653, 2002. doi: 10.1109/TCSI.2002.804596.
• [27] M. Tadeusiewicz, S, Hałgas, “Multiple soft fault diagnosis of nonlinear circuits using the continuation method”, J. Electron. Test., vol. 28, pp. 487-493, 2012. doi: 10.1007/s10836-012-5306-3.
• [28] M. Tadeusiewicz, S. Hałgas, “A new approach to multiple soft fault diagnosis of analog BJT and CMOS circuits”, IEEE Trans. Instrum. Measur., vol. 64, pp. 2688-2695, 2015. doi: 10.1109/TIM.2015.2421712.
• [29] M. Tadeusiewicz, S. Hałgas, “Multiple soft fault diagnosis of DC analog CMOS circuits designed in nanometer technology”, Analog Int. Cir. Sig. Proc., vol. 88, pp. 65-77, 2016. doi: 10.1007/s10470-016-0752-y.
• [30] M. Tadeusiewicz, A. Kuczyński, S. Hałgas, “Catastrophic fault diagnosis of a certain class of nonlinear analog circuits”, Circuits, Systems and Signal Processing, vol. 34, pp. 353-375, 2015. doi: 10.1007/s00034-014-9857-7.
• [31] W. Toczek, Z. Czaja, “Diagnosis of fully differential circuits based on a fault dictionary implemented in the microcontroller systems”, Microelectronic Reliability, vol. 51, pp. 1413-1421, 2011. doi: 10.1016/j.microrel.2011.02.022.
• [32] R.E. White, Elements of matrix modeling and computing with MATLAB. Chapman & Hall/CRC, Taylor & Francis Group, Boca Raton FL, 2007.

Uwagi

1. This work was supported by the Statutory Activities of Lodz University of Technology I12/1/DzS/2017.

2. Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).