High reliability flash file system used into data unit of flight data recorder

• Autorzy: Kordowski P. , Chodnicki M. , Nowakowski M.

Identyfikatory

DOI

10.5604/12314005.1216490

• Języki publikacji: EN

Abstrakty

EN

Since the appearance of the solid-state flight data recorders, semiconductor memories are still modernized and equipped with new features and higher capacities. This process allows developing new functionality for FDR’s but entails effort to design reliable memory management algorithms. In order to provide usage the entire memory area of modern semiconductor memories, is required to assure flash file system utilities inter alia wear levelling, error corrections and bad blocks management. There are some open source file systems for flash memories but any can face strict requirements of flight data recording data unit. Due to this reasons Air Force Institute of Technology has been developed flash file system adapted to meet the requirements. The most significant issue was to ensure of stable work after sudden power cut in any moment. To cover the highest level of assurance, additional memory is held in idle mode. Recording system is implemented into ARM Cortex-M3 microcontroller, which handles two nand flash memory chips. Whole code is written in C language so it can be effortless migrated into processor architectures. Article explains source of strict necessities and difficulties of creating high reliability flash file system and presents main features of it. In addition, there are explanations of selected algorithms in order to clarify developed software.

Słowa kluczowe

EN

transport; vehicles; flight data recorder; file system; semiconductor memory

• Wydawca: Łukasiewicz Research Network - Institute of Aviation ; European Science Society of Powertrain and Transport KONES Poland ; Wydawnictwo Instytutu Technicznego Wojsk Lotniczych
• Czasopismo: Journal of KONES
• Rocznik: 2016
• Tom: Vol. 23, No. 3
• Strony: 257--261
• Opis fizyczny: Bibliogr. 6 poz., rys.

Twórcy

autor

Kordowski P.

• Air Force Institute of Technology Airplanes and Helicopters Division Ks. Bolesława Street 6, 01-494 Warsaw, Poland tel.: [phone], fax: [phone]

autor

Chodnicki M.

• Air Force Institute of Technology Airplanes and Helicopters Division Ks. Bolesława Street 6, 01-494 Warsaw, Poland tel.: [phone], fax: [phone]

autor

Nowakowski M.

• Air Force Institute of Technology Airplanes and Helicopters Division Ks. Bolesława Street 6, 01-494 Warsaw, Poland tel.: [phone], fax: [phone]

Bibliografia

• [1] EUROCAE, Norma ED-112, Minimum Operational Performance Specification For Crash Protected Airborne Recorder Systems, 2004.
• [2] MICRON, TLC MLC and SLC Devices, 2015.
• [3] MICRON, NOR | NAND Flash Guide: Selecting a Flash Memory Solution for Embedded Applications, 2015.
• [4] MICRON, NAND Flash Memory MT29F2G08ABAEAH4, MT29F2G08ABAEAWP, MT29F2G08ABBEAH4, MT29F2G08ABBEAHC, MT29F2G16ABAEAWP, MT29F2G16A BBEAH4, MT29F2G16ABBEAHC, 2014.
• [5] Technical Note Error Correction Code (ECC) in Micron® Single-Level Cell (SLC) NAND, 2011.
• [6] BEA, Flight Data Recorder Read-Out Technical and Regulatory Aspects, France 2005.

Uwagi

PL

Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę.