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Efficient H.264 Intra Frame CODEC with Best Prediction Matrix Mode Algorithm

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Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
The continuous growth of smart communities and ever-increasing demand of sending or storing videos, have led to consumption of huge amount of data. The video compression techniques are solving this emerging challenge. However, H.264 standard can be considered most notable, and it has proven to meet problematic requirements. The authors present (BPMM) as a novel efficient Intra prediction scheme. We can say that the creation of our proposed technique was in a phased manner; it's emerged as a proposal and achieved impressive results in the performance parameters as compression ratios, bit rates, and PSNR. Then in the second stage, we solved the challenges of overcoming the obstacle of encoding bits overhead. In this research, we try to address the final phase of the (BPMM) codec and to introduce our approach in a global manner through realization of decoding mechanism. For evaluation of our scheme, we utilized VHDL as a platform. Final results have proven our success to pass bottleneck of this phase, since the decoded videos have the same PSNR that our encoder tells us, while preserving steady compression ratio treating the overhead. We aspire our BPMM algorithm will be adopted as reference design of H.264 in the ITU.
Rocznik
Strony
571--582
Opis fizyczny
Bibliogr. 24 poz., fot., rys., tab., wykr.
Twórcy
autor
  • Electrical Engineering Department, Benha Faculty of Engineering, Benha University, Egypt
  • Electronics and Communications Department, Faculty of Engineering, Ain Shams University, Egypt
  • Electrical Engineering Department, Benha Faculty of Engineering, Benha University, Egypt
Bibliografia
  • [1] G. Sundari, V. J. K. K. Sonti, and T. Bernatin, "FPGA Implementation of Modified Intra-Frame Prediction for H.264 Video Codec," International Journal of Pure and Applied Mathematics, vol. 118, no. 17, pp. 135–151, Jan. 2018.
  • [2] F. Golaghazadeh, S. p. Coulombe, F. X. Coudoux, and P. Corlay, "Low complexity H. 264 list decoder for enhanced quality real-time video over IP," IEEE, , pp. 1-6, 2017.
  • [3] A. Elyousfi, A. El Hachimi, and H. Hamout, "Texture complexity based fast and efficient intra block mode decision algorithm for H. 264/AVC," IEEE, pp. 1-4, 2017.
  • [4] I. A. Ali, S. Moiron, M. Fleury, and M. Ghanbari, "Data Partitioning Technique for Improved Video Prioritization," Computers., vol. 6, no. 3, p. 23, 2017.
  • [5] M. Al-Jammas and R. Nabeel, "IBBB Inter Frame Prediction of H.264 /AVC," International Journal of Computer Applications, vol. 181, no. 14, pp. 0975-8887 , Sept. 2018.
  • [6] I. J. Barge and C. Ababei, "H. 264 video decoder implemented on FPGAs using 3x3 and 2x2 networks-on-chip," IEEE, pp. 1-6, 2017.
  • [7] Chahrazed Adda and Abou Elhassen Benyamina, "Design of the H264 application and Implementation on Heterogeneous Architectures," International Journal of Computer Applications, vol. 180 , no. 7 Sept. 2017.
  • [8] I. E. Richardson, The H. 264 advanced video compression standard John Wiley & Sons, 2011.
  • [9] S. Hamdy, M. E. Ibrahim, and A. Zekry, "VHDL realization of efficient H. 264 intra prediction scheme based on best prediction matrix mode," Int. J. Comput. Appl., vol. 77, pp. 1-7, 2013.
  • [10] A. S. Hamdy, B. M. E. Ibrahim, and C. M. B. Abdelhalim, "Efficient H.264 intra prediction scheme based on best prediction matrix mode," IEEE, pp. 363-367, 2013.
  • [11] R. Mukherjee, A. Banerjee, I. Chakrabarti, P. K. Dutta, and A. K. Ray, "Efficient VLSI design of CAVLC decoder of H. 264 for HD videos," IEEE, pp. 1-4, 2017.
  • [12] M. H. Al-Jammas, and N. N. Hamdoon, "FPGA Implementation of Intra Frame for H. 264/AVC Based DC Mode," International. Journal of Computer. Engineering. and Information. Technology, vol. 9, no. 11, pp. 264-270, 2017.
  • [13] La-Gou Wu, Yu-Kun Song, Gao-Ming Du, and uo-Li Zhang, "A 4x4 Pipelined Intra Frame Decoder for H.264," International Conference on Anti-counterfeiting, Security, and Identification in Communication, vol. 3rd June. 2009.
  • [14] S. Xu, Y. Xing, and X. Wei, "Design of intra prediction module in H. 264 and AVS dual modes video decoder chip,", 2 ed IEEE, 2011, pp. 635-638.
  • [15] M. Nadeem, S. Wong, and G. Kuzmanov, "An efficient hardware design for intra-prediction in H. 264/AVC decoder," IEEE, pp. 1-6, 2011.
  • [16] M. S. Alizadeh and M. Sharifkhani, "Low complexity downsizer H. 264 decoder," IEEE, pp. 604-607, 2014.
  • [17] G. S. Yogesh and S. Ramachandran, "Context adaptive variable length decoder of H. 264," IEEE, pp. 286-290, 2014.
  • [18] C.-Y. K. H.-C. a. J.-W. C. Youn-Long Steve Lin, "VLSI Design for Video Coding:H.264/AVC Encoding from Standard Specification to Chip," Springer Publishing Company, 2010.
  • [19] L. Wang, L. M. Po, Y. M. S. Uddin, K. M. Wong, and S. Li, "A novel weighted cross prediction for H. 264 intra coding," Citeseer, pp. 165-168, 2009.
  • [20] A. H. Henson, "264 Hardware Encoder in VHDL," Tech. Rep., Zexia. Access. Ltd., 2008.
  • [21] S. Hamdy, A. Zekry, and W. A. Mohamed, "Development of the Best prediction matrix mode algorithm for intra prediction in H.264 encoder," International Journal of Engineering & Technology, pp. 13595-13601, Dec. 2018.
  • [22] K. Xu, "Nova: a H.264/AVC Baseline Decoder Specification Rev.0.1", OpenCores, 2008.
  • [23] T. Song, A. Shimamoto, T. Bando, and W. Zhao, "Novel Intra modes with Temporal-Spatial Prediction for H.264/AVC," IEEE International Conference on Consumer Electronics-Berlin (ICCCE-B), pp. 62-65, Sept. 2011.
  • [24] N. Manjanaik, B. D. Parameshachari, S. N. Hanumanthappa, and R. Banu, " Intra Frame Coding In Advanced Video Coding Standard (H.264) to Obtain Consistent PSNR and Reduce Bit Rate for Diagonal Down Left Mode Using Gaussian Pulse," IOP Conference Series: Materials Science and Engineering, vol. 225, pp. 1-9, 2017.
Uwagi
Opracowanie rekordu ze środków MNiSW, umowa Nr 461252 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2020).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-916d1a8c-0a22-41a1-b7dc-fad4abda42d4
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