Event-driven firmware design with hardware handler scheduling on Cortex-M-based microcontroller

• Autorzy: Mazur G.
• Języki publikacji: EN

Abstrakty

EN

The paper describes the concept and the design principles of a purely event-driven firmware for a Cortex-M core microcontroller used in an embedded system, based on hardware-scheduled event handling routines. The concept may be a practical alternative to the design paradigm based on an event loop or a real-time operating system, especially for not overly complex designs. When compared to an RTOS-based approach, the presented technique enables much shorter event response time and simpler synchronization of accesses to critical shared resources.

Słowa kluczowe

EN

Event-driven framework; Event-driven programming; exception handler; interrupt controller; ARM Cortex-M; RTOS

• Wydawca: Wydawnictwo PAK
• Czasopismo: Measurement Automation Monitoring
• Rocznik: 2018
• Tom: Vol. 64, No. 1
• Strony: 20--22
• Opis fizyczny: Bibliogr. 7 poz., rys.

Twórcy

autor

Mazur G.

• Institute of Computer Science, Warsaw University of Technology, 15/19 Nowowiejska St., 00-665 Warszawa

Bibliografia

• [1] Barry R.: Mastering the FreeRTOS™ Real Time Kernel, Real Time Engineers Ltd. 2016
• [2] Cheong E., Liebman J., Liu J., Zhao F.: TinyGALS: A Programming Model for Event-Driven Embedded Systems. Proceedings of the 2003 ACM Symposium on Applied Computing (SAC), March 9-12, 2003, Melbourne, FL, USA
• [3] Dunkels A., Schmidt O., Voigt T., Ali M.: Protothreads: Simplifying Event-Driven Programming of Memory-Constrained Embedded Systems. Proceedings of the 4th International Conference on Embedded Networked Sensor Systems, SenSys 2006, Boulder, Colorado, USA, October 31 - November 3, 2006
• [4] Stanek M.: Beyond the RTOS: A Better Way to Design Real-Time Embedded Software, Quantum Leaps. LLC, 2016.
• [5] ARM®v7-M Architecture Reference Manual, ARM DDI 0403E, 2014.
• [6] ST Microelectronics: RM0351 STM32L4x5 and STM32L4x6 advanced ARM®-based 32-bit MCUs Reference Manual. 2016.
• [7] Kosowska J., Mazur G.: Software-Defined Computer with a Classic Microprocessor. MAM 05 ’2017 pp. 186-188.

Uwagi

PL

Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2019).