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Design, development and verification of a new multilevel inverter for reduced power switches

Treść / Zawartość
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Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
Due to recent developments in the field of high-power and medium-voltage, the multilevel inverter has raised to such an extent owing to some of its amazing facts regarding harmonic spectrum, ease in control, reduced electromagnetic interference (EMI), filterless circuit, stress on power switches, common-mode voltage. This paper well describes a novel architecture of a single-phase multilevel inverter using a lesser number of overall components, especially the power switches. The proposed topology is generalized in the structure that can generate any number of voltage steps. A 7-level structure of the proposed topology is explained and is elaborately discussed. Simulation is carried out in MATLAB and corresponding experimental results verify the existence of the proposed multilevel inverter. The real-time experimental results were presented and are well verified by the simulation results for 7-level as well for 13-level across RL-Load. The nature of load current is also indicated as per the nature of load voltage. Nevertheless, the topology is further compared with some of the recent literature and found superior in each respect.
Rocznik
Strony
1051--1063
Opis fizyczny
Bibliogr. 25 poz., rys., tab., wz.
Twórcy
  • ABES Engineering College Ghaziabad, UP – 201009, India
  • Gaya College of Engineering Gaya, Bihar – 823003, India
  • Indian Institute of Technology (Indian School of Mines) Dhanbad – 826004, India
  • Government Engineering College Siwan, Bihar – 841226, India
  • Gaya College of Engineering Gaya, Bihar – 823003, India
Bibliografia
  • [1] Belkacem R.E., Benzid R., Bouguechal N., Multilevel inverter with optimal THD through the firefly algorithm, Archives of Electrical Engineering, vol. 66, no. 1, pp. 141–154 (2017), DOI: 10.1515/aee-2017-0010.
  • [2] Rodríguez J., Lai J.S., Peng F.Z., Multilevel inverters: A survey of topologies controls and applications, IEEE Transactionson Industrial Electronics, vol. 49, no. 4, pp. 724–38 (2002), DOI: 10.1109/TIE.2002.801052.
  • [3] Jha K.K., Mahato B., Prakash P., Active power factor correction for rectifier using micro-controller, 3rd International Conference on Recent Advances in Information Technology, ISM Dhanbad, India, pp. 331–336 (2016), DOI: 10.1109/RAIT.2016.7507926.
  • [4] Sotoodeh P., Miller R.D., Design and implementation of an 11-level inverter with FACTS capability for distributed energy systems, IEEE Journal of emerging and selected topics in power electronics, vol. 2, no. 1, pp. 87–96 (2014), DOI: 10.1109/JESTPE.2013.2293311.
  • [5] Xiao B., Hang J., Mei J. et al., Modular cascaded H-bridge multilevel PV inverter with distributed MPPT for grid-connected applications, IEEE Transactions on Industry Applications, vol. 51, no. 2, pp. 1722–1731 (2015), DOI: 10.1109/TIA.2014.2354396.
  • [6] Hagiwara M., Hasegawa M., Akagi H., Start-up and low-speed operation of an electric motor driven by a modular multilevel cascade inverter, IEEE Transactions on Industry Applications, vol. 49, no. 4, pp. 1556–1565 (2013), DOI: 10.1109/TIA.2013.2256331.
  • [7] Varschavsky A., Dixon J., Rotella M. et al., Cascaded nine-level inverter for hybrid-series active power filter using industrial controller, IEEE Transactions on Industrial Electronics, vol. 57, no. 8, pp. 2761–2767 (2010), DOI: 10.1109/TIE.2009.2034185.
  • [8] Malinowski M., Gopakumar K., Rodriguez J. et al., A survey on cascaded multilevel inverters, IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2197–2206 (2010), DOI: 10.1109/TIE.2009.2030767
  • [9] Wang K., Li Y., Zheng Z. et al., Voltage balancing and fluctuation-suppression methods of floating capacitors in a new modular multilevel converter, IEEE Transactions on Industrial Electronics, vol. 60, no. 5, pp. 1943–1954 (2013), DOI: 10.1109/TIE.2012.2201433.
  • [10] Vazquez S., Leon J.I., Franquelo L.G., Padilla J.J., Carrasco J.M., DC-voltage-ratio control strategy for multilevel cascaded converters fed with a single DC source, IEEE Transactions on Industrial Electronics, vol. 56, no. 7, pp. 2513–2521 (2009), DOI: 10.1109/TIE.2009.2017549.
  • [11] Yang S., Xiang D., Bryant A. et al., Condition monitoring for device reliability in power electronic converters: A review, IEEE Transactions on Power Electronics, vol. 25, no. 11, pp. 2734–2752 (2010), DOI: 10.1109/TPEL.2010.2049377.
  • [12] Agarwal R., Jain S., Multilevel inverter for interfacing renewable energy sources with low/medium- and high-voltage grids, IET Renew. Power Gener., vol. 11, no. 14, pp. 1822–1831 (2017), DOI: 10.1049/iet-rpg.2016.1034.
  • [13] Arun M., Noel M.M., Crisscross switched multilevel inverter using cascaded semi-half-bridge cells, IET Power Electron., vol. 11, no. 1, pp. 23–32 (2018), DOI: 10.1049/iet-pel.2016.0644.
  • [14] Samadaei E., Sheikholeslami A., Gholamian S.A., Adabi J., A Square T-Type (ST-Type) Module for Asymmetrical Multilevel Inverters, IEEE Transactions on Power Electronics, vol. 33, no. 2, pp. 987–996 (2018), DOI: 10.1109/TPEL.2017.2675381.
  • [15] Lee S.S., Sidorov M., Idris N.R.N., Heng Y.E., A Symmetrical Cascaded Compact-Module Multilevel Inverter (CCM-MLI) with Pulsewidth Modulation, IEEE Transactions on Industrial Electronics, vol. 65, no. 6, pp. 4631–4639 (2018), DOI: 10.1109/TIE.2017.2772209.
  • [16] Lee S.S., Sidorov M., Idris N.R.N., Heng Y.E., Hybrid Cascaded Multilevel Inverter (HCMLI) with Improved Symmetrical 4-Level Submodule, IEEE Transactions on Power Electronics, vol. 33, no. 2, pp. 932–935 (2018), DOI: 10.1109/TPEL.2017.2726087.
  • [17] Lee S.S., Single-Stage Switched-Capacitor Module (S3CM) Topology for Cascaded Multilevel Inverter, IEEE Transactions on Industrial Electronics, pp. 1–1 (2018), DOI: 10.1109/TPEL.2018.2805685.
  • [18] Siddique M.D., Mekhilef S., Shah N.M., Memon M.A., Optimal design of a new cascaded multilevel inverter topology with reduced switch count, IEEE Access, vol. 7, pp. 24498–24510 2019, DOI: 10.1109/ACCESS.2019.2890872.
  • [19] Siddique M.D., Mekhilef S., Shah N.M., Ali J.S.M., Blaabjerg F., A new switched capacitor 7L inverter with triple voltage gain and low voltage stress, IEEE Transactions on Circuits Syst. II, Exp. Briefs, vol. 67, no. 7, pp. 1294–1298 (2020), DOI: 10.1109/TCSII.2019.2932480.
  • [20] Hashfi T.B., Mekhilef S., Mubin M., Seyedmahmoudian M., Horan B., Stojcevski A., Adaptive carrier-based pdpwm control for modular multilevel converter with fault-tolerant capability, IEEE Access, vol. 8, pp. 26739–26748 (2020), DOI: 10.1109/ACCESS.2020.2970725.
  • [21] Siddique M.D., Ali J.S.M., Mekhilef S., Mustafa A., Sandeep N., Almakhles D., Reduced switch count based single source 7L boost inverter topology, IEEE Transactions on Circuits Syst. II, Exp. Briefs, vol. 67, no. 12, pp. 3252–3256 (2020), DOI: 10.1109/TCSII.2020.2988090.
  • [22] Jana K.C., Biswas S.K., Chowdhury S.K., Dual reference phase shifted pulse width modulation technique for a N-level inverter-based grid connected solar photovoltaic system, IET Renew. Power Gener., vol. 10, no. 7, pp. 928–935 (2016), DOI: 10.1049/iet-rpg.2015.0393.
  • [23] Mahato B., Raushan R., Jana K.C., Comparative Study of Asymmetrical Configuration of Multilevel Inverter for Different Levels, 3rd International Conference on Recent Advances in Information Technology, ISM Dhanbad, India, pp. 300–303 (2016), DOI: 10.1109/RAIT.2016.7507920.
  • [24] Dahidah M.S.A., Konstantinou G., Agelidus V.G., A Review of Multilevel Selective Harmonic Elimination PWM: Formulations, Solving Algorithms, Implementation and Applications, IEEE Transactions on Power Electronics, vol. 30, no. 8, pp. 4091–4106 (2015), DOI: 10.1109/TPEL.2014.2355226.
  • [25] Kumar C., Mahato B. et al., Comprehensive study of various configurations of three-phase Multilevel inverter for different levels, 3rd International Conference on Recent Advances in Information Technology, ISM Dhanbad, India, pp. 310–315 (2016), DOI: 10.1109/RAIT.2016.7507922.
Uwagi
Opracowanie rekordu ze środków MEiN, umowa nr SONP/SP/546092/2022 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2022-2023).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-8ca1ab28-2b69-4b60-a370-484688be5991
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