Synchronous and asynchronous structural implementation of Łukasiewicz norms in Spartan-6 FPGAs

• Autorzy: Surdej Ł. , Gniewek L.
• Języki publikacji: EN

Abstrakty

EN

Fast time to market, high performance and low cost make new FPGAs a competition for dedicated VLSI device in many area. Their array architecture with lots of programmable resources and IO pins is attractive hardware platform for implementation a complex fuzzy systems. The article discusses the realization of fuzzy Łukasiewicz operations in Xilinx Spartan6 FPGAs, which in addition to Zadeh operations, are basic elements in fuzzy systems. Safe behavioral description of these operations that define functionalities independent of the hardware platform are presented. Structural descriptions of both synchronous and asynchronous fuzzy operations are shown, to carry out their primitive level realization and the effective utilization of basic elements of the FPGA structure. As the result the area optimized implementation of Łukasiewicz operations are obtained.

Słowa kluczowe

EN

fuzzy hardware; fuzzy Łukasiewicz norms; FPGA

• Wydawca: Wydawnictwo PAK
• Czasopismo: Measurement Automation Monitoring
• Rocznik: 2016
• Tom: Vol. 62, No. 11
• Strony: 361--366
• Opis fizyczny: Bibliogr. 10 poz., schem., tab., wzory

Twórcy

autor

Surdej Ł.

• Rzeszow University of Technology, Department of Computer and Control Engineering, 12 Powstańców Warszawy Ave., 35-959 Rzeszów, Poland

autor

Gniewek L.

• Rzeszow University of Technology, Department of Computer and Control Engineering, 12 Powstańców Warszawy Ave., 35-959 Rzeszów, Poland

Bibliografia

• [1] Fodor J., Yager R.: Fuzzy Set-Theoretic Operators and Quantifiers. In: Dubois, D., Prade, H. (eds.) Fundamentals of Fuzzy Sets. Kluver, pp. 125-193, 2000.
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• [3] Kowalski Piotr A.: Evolutionary strategy for the Fuzzy Flip-Flop neural networks supervised learning procedure. Artificial Intelligence and Soft Computing. Springer Berlin Heidelberg, p. 294-305, 2013.
• [4] Gniewek L.: Sequential Control Algorithm in The Form of Fuzzy Interpreted Petri Net. IEEE Transactions on Systems, Man, and Cybernetics: Systems, vol. 43, no. 2, pp. 451–459, March 2013.
• [5] Yamakawa T, Miki T.: The Current Mode Fuzzy Logic Integrated Circuits Fabricated by the Standard CMOS Process. IEEE Transactions on Computers, vol. 35, no. 2, pp. 161-167, 1986.
• [6] Hirota K., Ozawa K.: The Concept of Fuzzy Flip-Flop. IEEE Transactions on Systems, Man, and Cybernetic, vol. 19, no. 5, pp. 980-997, 1989.
• [7] Lovassy R., Zavala A., Gál L., Nieto O. C., Kóczy L., Batyrshin I.: Hardware Implementation of Fuzzy Flip-Flops Based on Łukasiewicz Norms. Proceedings of the 9th WSEAS Int. Conference on Applied Computer and Applied Computational Science, Wisconsin, pp. 196-201, 2010.
• [8] Lovassy R., Gál L., Tóth Á., Kóczy L. T., Rudas I. J.: Fuzzy Flip-Flop based Neural Networks as a novel implementation possibility of multilayer perceptrons. Instrumentation and Measurement Technology Conference (I2MTC), IEEE, 2012, pp. 280 – 285.
• [9] Hajduk Z., Wojtowicz J.: Hardware Implementation of Fuzzy Petri Nets with Lukasiewicz Norms for Modelling of Control Systems. Lecture Notes in Computer Science, vol. 9621. Springer Berlin Heidelberg, pp. 449-458, 2016.
• [10] Spartan-6 FPGA Configurable Logic Block User Guide, UG384, Xilinx, 2010.

Uwagi

PL

Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę (zadania 2017).