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A new technique to enhance single-stage operational transconductance amplifiers (OTAs) is presented. Enhanced DC gain and reduced input parasitic capacitances are achieved by employing two input fully-differential voltage combiners, i.e. a combination of transistors in common-drain and common-source configurations operating as a preamplifier stage. Simulation results show that the input capacitance can be as small as 195 fF (corresponding to a 46 % reduction) while achieving a GBW of 1982 MHZ (@ CL = 1 pF) with a PM of about 60⁰. The complete amplifier dissipates only 1.78 mW corresponding to a figure-of-merit (FoM) of 1115 MHz-pF/mW.
Rocznik
Tom
Strony
175--179
Opis fizyczny
Bibliogr. 15 poz.
Twórcy
autor
- CTS-UNINOVA / Dept. de Eng. Electrotécnica e Computadores, Faculdade de Ciencias e Tecnologia, Universidade Nova de Lisboa, FCT Campus, 2829-517 Caparica, Portugal
autor
- CTS-UNINOVA / Dept. de Eng. Electrotécnica e Computadores, Faculdade de Ciencias e Tecnologia, Universidade Nova de Lisboa, FCT Campus, 2829-517 Caparica, Portugal
autor
- CTS-UNINOVA / Dept. de Eng. Electrotécnica e Computadores, Faculdade de Ciencias e Tecnologia, Universidade Nova de Lisboa, FCT Campus, 2829-517 Caparica, Portugal
autor
- CTS-UNINOVA / Dept. de Eng. Electrotécnica e Computadores, Faculdade de Ciencias e Tecnologia, Universidade Nova de Lisboa, FCT Campus, 2829-517 Caparica, Portugal
autor
- CTS-UNINOVA / Dept. de Eng. Electrotécnica e Computadores, Faculdade de Ciencias e Tecnologia, Universidade Nova de Lisboa, FCT Campus, 2829-517 Caparica, Portugal
Bibliografia
- [1] R. Tavares, et al., "Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance", ISCAS 2003, vol.1, pp. I-197-200, May 2003.
- [2] Huijsing, Johan, “Operational Amplifiers: Theory and Design”, Springer; 2nd edition. 2011; ISBN 9400705956.
- [3] Assaderaghi, F., Sinitsky, D., Parke, S., Bokor, J., Ko, P.K., Chenming Hu “A dynamic threshold voltage MOSFET (DTMOS) for ultra-low voltage operation”, IEEE Electron Devices Meeting, No. 12, Vol. 15, pp. 809-812, 1994.
- [4] José Rui Custodio, Michael Figueiredo, Edinei Santin, Joao Goes, “A CMOS Inverter-based self-biased fully differential amplifier”, in Luis M. Camarinha-Matos, Pedro Pereira, Luis Ribeiro, editors, DoCElS, volume 314 of IFIP Emerging Trends in Technological Innovation, pp. 541-548, Springer, 2010.
- [5] Maymandi-Nejad, M., Sachdev, M., “DTMOS technique for low-voltage analog circuits”, IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 14, Issue 10, Pages 1151-1156, 2006.
- [6] M. Figueiredo, et al., “A Two-Stage Fully Differential Inverter-based Self-Biased CMOS Amplifier with High Efficiency”, IEEE T-CAS I: Regular Papers, Vol. 58, Issue 7, Page(s): 1591 1603, 2011.
- [7] Won-Chul Song, et al. , “A 10-b 20-Msample/s Low-Power CMOS ADC”, IEEE JSSC, Vol. 30, Issue 5, Page(s): 514 - 520, 1995.
- [8] Pekarik, J. et al. , " RFCMOS Technology from 0.25um to 65nm: The State of the Art", Proceedings of the IEEE 2004 CICC, pp. 217-224, 2004.
- [9] Mezyad M. Amourah and Randall L. Geiger, “All Digital Transistors High Gain Operational Amplifier Using Positive Feedback Technique”, ISCAS 2002, Vol. 1, Page(s): I-701 - I-704, 2002.
- [10] Rida S. Assaad and Jose Silva-Martinez, “The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier”, IEEE JSSC, Vol 44, Issue 9, Page(s): 2535 - 2542, 2009.
- [11] You Zheng; Saavedra, C.E., "Feedforward-Regulated Cascode OTA for Gigahertz Applications," TCAS-I: Regular Papers, Vol.55, no.11, pp.3373,3382, Dec. 2008.
- [12] K. Gulati, H-S. Lee, “A i2.45V-Swing CMOS Telescopic Operational Amplifier”, ISSCC 1998, Page(s): 324 - 325, 456, 1998.
- [13] O. Choksi; L.R. Carley, "Analysis of switched-capacitor common-mode feedback circuit", IEEE TCAS II: Analog and Digital Signal Processing, vol.50, pp. 906-917, Dec. 2003.
- [14] F. Leyn, W. Daems, G. Gielen, W. Sansen, "A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps", CAD, Dig. of Tech. Papers, pp. 374-381, Nov 1997.
- [15] A. D. Grasso, G. Palumbo and S. Pennisi, “Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme”, IEEE TCAS-II, Vol. 53, pp. 1044-1048, Oct. 2006.
Typ dokumentu
Bibliografia
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bwmeta1.element.baztech-85ad2bfb-5782-41a6-ba32-b6c488a9b359
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