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Analysis of disturbing effect of 3 kV DC supplied traction vehicles equipped with two-level and three-level VSI on railway signalling track circuits

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Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
Electric traction vehicles cooperating with a 3kV DC traction system and equipped with drive systems based on voltage source inverters are the most significant sources of disturbances for a railway signalling system. Every traction vehicle to be authorised for operation on railway lines must fulfil the limits imposed on current harmonics magnitudes and those provided by railway operators. The solution introduced for prototypes of most modern traction drives is to replace the two-level inverters with three-level topology. Therefore, it is essential to establish the influence of the new solution on the railway signalling system. This paper presents a comparative analysis between simulation results delivered for two and three-level traction drive system regarding generation of disturbing current harmonics. Two types of VSI modulation techniques were taken under consideration: sinusoidal PWM (SPWM) and a new one, proposed by the authors, based on selective harmonic elimination (SHE). Furthermore, the authors presented application of one of the SHE based optimization techniques for shaping the EMU’s (electric multiple unit) DC side input current harmonics spectrum in order to meet the required limits. The described technique is based on off-line generation of a set of solutions for each of the VSI operating points and selection of the best solution for the assumed criteria. The applied simulation models and the concept of SHE control were verified in a laboratory by means of a low-power drive stand. Using the three-level inverter in traction drives system results in less current harmonics than using two-level topology without modification of the modulation technique. Thus, it does not guarantee fulfilling all limits assumed in this paper. The proposed modulation technique allows for fulfilling the limits, and the technical implementation of the proposed technique in a traction drive system will be considered in future studies.
Rocznik
Strony
663--674
Opis fizyczny
Bibliogr. 22 poz., rys., wykr., tab.
Twórcy
autor
  • Lodz University of Technology,116 Żeromskiego St., 90-924 Łódź, Poland
autor
  • Warsaw University of Technology, 1 Politechniki Sq., 00-661 Warsaw, Poland
  • Jadavpur University, 188, Raja Subodh Chandra Mallick Road, Jadavpur, Kolkata, West Bengal 700032, Indie
Bibliografia
  • [1] A. Białoń, A. Kazimierczak, J. Furman, Ł. Zawadka, D. Adamski, P. Pajka, and K. Ortel, “Defining limits and levels of disturbances in signalling and cotrol railway systems”, Railway Institute, Warsaw, Report 4430/10 for PKP PLK S.A. (in Polish), 2011.
  • [2] H. Bernhard, A. Mariscotti, and D. Wuergler, “Recommendations for the calculation of the total disturbing return current from electric traction vehicles”, IEEE Transactions on Power Delivery 19 (3), 1190‒1197 (2004).
  • [3] A. Ogunsola and A. Mariscotti, “Electromagnetic compatibility in railway. Analysis and management”, Lecture Notes in Electrical Engineering, Springer-Verlag Berlin, 1‒528 (2013).
  • [4] A. Choudchury, P. Pillay, and S.S. Williamson, “Comparative analysis between two-level and three-level DCAC electric vehicle traction inverters using a novel DC-link voltage balancing algorithm”, IEEE Journal of Emerging and Selected Topics in Power Electronics 2 (3), (2014).
  • [5] D. Prajapati, V. Ravindran, J. Sutaria, and P. Patel, “A comparative study of three phase 2-level VSI with 3-level and 5-level diode clamped multilevel inverter”, International Journal of Emerging Technology and Advanced Engineering 4 (4), 708–713 (2014).
  • [6] R.K. Behera, S.P. Das, and O. Ojo, “Utility friendly three-level neutral point clamped converter-fed high-performance induction motor drive”, IET Power Electron. 5 (7), 1196‒1203 (2012).
  • [7] S.R. Pulikanti, M.S.A. Dahidah, and V.G. Adelidis, “Voltage balancing control of three-level active NPC converter using SHE-PWM”, IEEE Trans. on Power Delivery 26 (1), (2011).
  • [8] A. Choudchury, P. Pillay, S.S. Williamson, “A hybrid PWM based DC-link voltage balancing algorithm for a three-level NPC DC/AC traction inverter drive”, IEEE Journal of Emerging and Selected Topics in Power Electronics 3 (3), (2015).
  • [9] A. Ghaderi, T. Umeno, and M. Sugai, “An altered PWM scheme for single-mode seamless control of AC traction motors for electric drive vehicles”, IEEE Trans. on Ind. Electron. 63 (3), (2016).
  • [10] C. Broche, J. Lobry, P. Colignon, and A. Labart, “Harmonic reduction in DC link current of a PWM induction motor drive by active filtering”, IEEE Trans. Power Electron. 7 (4), (1992).
  • [11] H. Ye and A. Emadi, “An interleaving scheme to reduce DC link current harmonics of dual traction inverters in hybrid electric vehicles”, IEEE A Power Electron. Conf. and Exp., 3205‒3211 (2014).
  • [12] T. Ogawa and S. Wako, “Theoretical analysis of cancellation of DC-link current harmonics in the inverter-controlled DC electric railcar”, IEEE European Conf. on Power Electron., 1‒10 (2007).
  • [13] Y. Yang, P. Davari, F. Zare, and F. BlaabJerg, “A DC-link modulation scheme with phase-shifted current control for harmonic cancellations in multidrive applications“, IEEE Trans. Power Electron. 31 (3), (2016).
  • [14] F.G. Turnbull, “Selected harmonic reduction in static dc-ac inverters”, IEEE Trans Communication and Electronics 83, 374‒378 (1964).
  • [15] H.S. Patel and R.G. Hoft, “Generalized techniques of harmonic elimination and voltage control in thyristor inverters: part I – harmonic elimination”, IEEE Trans. Industry Applications, IA-9, 310‒317 (1973).
  • [16] H.S. Patel and R.G. Hoft, “Generalized techniques of harmonic elimination and voltage control in thyristor inverters: part II – voltage control techniques”, IEEE Trans. Ind. Applications, IA-10, 666‒673 (1974).
  • [17] J. Napoles, J.I. Leon, R. Portillo, L.G. Franquelo, and M.A. Aguirr, “Selective harmonic mitigation technique for high-power converters”, IEEE Trans on Ind. Electron. 57 (7), 2315‒2323 (2010).
  • [18] M. Steczek and A. Szeląg, “Modification of selective harmonics elimination method for effective catenary current harmonics reduction”, IEEE Int. Conf. Electrical Drives and Power Electronics, 394‒401, Slovakia (2015).
  • [19] W. Cong, F. Zhao, X. Guo, X. Wen, Y. Wang, and X. Song, “Analysis and experimental verification for multiple solutions of bipolar SHEPWM waveforms applied in control system of induction machines”, IEEE Int. Conf. on Electrical Machines and Systems, 1‒4 (2011).
  • [20] M. Lewandowski and A. Szelag, “Minimizing harmonics of the output voltage of the chopper inverter”, Archiv für Electrotechnik 69, 223‒226 (1986).
  • [21] R.N. Ray, D. Chatterjee, and S.K. Goswami, “An application of PSO technique for harmonic elimination in a PWM inverter”, Applied Soft Computing (9), 1315‒1320 (2009).
  • [22] M. Steczek, P. Chudzik, and A. Szeląg, “Combination of SHE and SHM – PWM techniques for VSI DC-link current harmonics control in railway applications”, IEEE Transactions on Industrial Electronics, Early Access, DOI 10.1109/TIE.2017.2694357 (2017).
Uwagi
PL
Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę (zadania 2017).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-8586dc94-acb9-48b5-9cc0-c05e1197291b
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