Shared-Semaphored Cache Implementation for Parallel Program Execution in Multi-Core Systems

• Autorzy: Milik Adam , Walichiewicz Michał

Identyfikatory

DOI

10.24425/ijet.2023.144373

• Języki publikacji: EN

Abstrakty

EN

The paper brings forward an idea of multi-threaded computation synchronization based on the shared semaphored cache in the multi-core CPUs. It is dedicated to the implementation of multi-core PLC control, embedded solution or parallel computation of models described using hardware description languages. The shared semaphored cache is implemented as guarded memory cells within a dedicated section of the cache memory that is shared by multiple cores. This enables the cores to speed up the data exchange and seamlessly synchronize the computation. The idea has been verified by creating a multi-core system model using Verilog HDL. The simulation of task synchronization methods allows for proving the benefits of shared semaphored memory cells over standard synchronization methods. The proposed idea enhances the computation in the algorithms that consist of relatively short tasks that can be processed in parallel and requires fast synchronization mechanisms to avoid data race conditions.

Słowa kluczowe

EN

thread synchronization; scheduling; mapping; parallel execution; compiler

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2023
• Tom: Vol. 69, No. 2
• Strony: 371--382
• Opis fizyczny: Bibliogr. 12 poz., rys., tab.

Twórcy

autor

Milik Adam

• Silesian University of Technology, Faculty of Automatic Control, Electronics and Computer Science, Digital Systems Division, Gliwice, Poland

autor

Walichiewicz Michał

• Silesian University of Technology, Faculty of Automatic Control, Electronics and Computer Science, Digital Systems Division, Gliwice, Poland

Bibliografia

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Uwagi

1. Opracowanie rekordu ze środków MEiN, umowa nr SONP/SP/546092/2022 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2022-2023).

2. This work was supported by funding from the Ministry of Education and Science for Statutory Activities of Digital Systems Division of the Silesian University of Technology of Gliwice (BK247/RAu12/2022 and BKM576/RAu12/2022).