The Implementation of the Parallel Scrambler Scheme for the IEEE 802.11 Standard

• Autorzy: Kudinov A. , Antimirov Y. , Tyshchenko I. , Popova M. , Cherepanov A.

Identyfikatory

DOI

10.24425/118151

• Języki publikacji: EN

Abstrakty

EN

This article is devoted to the development of the scrambler circuit. Nowadays, new WiFi standard IEEE 802.11 is being put into operation, so that there is a huge need in modern, energy-efficient algorithms, which will be used in the data transmission. Consequently, some of the scrambler circuits, which could be implemented for the IEEE 802.11 standard are described with its comparison. In addition, an example in Python is given for readers to use it in their researches.

Słowa kluczowe

EN

scrambler; sequential circuit; parallel circuit

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2018
• Tom: Vol. 64, No. 1
• Strony: 91--94
• Opis fizyczny: Bibliogr. 6 poz., rys., tab.

Twórcy

autor

Kudinov A.

• Ural Federal University, Yekaterinburg, Russia

autor

Antimirov Y.

• Ural Federal University, Yekaterinburg, Russia

autor

Tyshchenko I.

• Ural Federal University, Yekaterinburg, Russia

autor

Popova M.

• Ural Federal University, Yekaterinburg, Russia

autor

Cherepanov A.

• Ural Federal University, Yekaterinburg, Russia

Bibliografia

• [1] W. Stallings, “Data and Computer Communications, 8th Edition”. Upper Saddle River: Pearson Prentice Hall, 2007 pp. 146-151.
• [2] 802.11ah-2016 - IEEE Standard for Information technology - Telecommunications and information exchange between systems - Local and metropolitan area networks - Specific requirements - Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications Amendment 2: Sub 1 GHz License Exempt Operation.
• [3] Lotfi A. Zadeh and Charles A. Desoer, “Linear System Theory: The State Space Approach”. N.Y.: McGraw-Hill Book Company, 1963, 628 p.
• [4] G. Albertengo, R. Sisto, “Parallel CRC Generation”, IEEE Micro, vol. 10, no. 5, pp. 63-71, Oct. 1990. DOI: 10.1109/40.60527.
• [5] Giuseppe Campobello, Giuseppe Patane, Marco Russo, “Parallel CRC Realization,” IEEE Transactions on Computers, vol. 52, no. 10, рр. 1312-1319, Oct. 2003. DOI: 10.1109/TC.2003.1234528.
• [6] J.Borges and J.Rifa, “А Characterization of 1-Perfect Additive Codes,” IEEE Transactions on Information Theory, vol. 45, no. 5, pp. 1688-1697, Jul. 1999. DOI: 10.1109/18.771247.

Uwagi

1. The Russian Ministry of Education and Science funded the works on RFMEFI57815X0136 under the agreement №14.578.21.0136 of October 27 2015.

2. Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).