Distributed electrothermal modeling methodology for MOS gated power devices simulations

• Autorzy: Marcault E , Tounsi P. , Massol J.-L , Dorkel J.-M
• Języki publikacji: EN

Abstrakty

EN

Currently electro-thermal simulations performed with 3D FEM simulators like ANSYS or COMSOL Multiphysics are limited to an imposed current flow through resistive materials. However, in the case of power MOS gated transistors like VDMOS transistors or IGBT, the channel resistance evolves with the gate voltage. This phenomenon is usually neglected in ON-state applications but seems to be determinant in switching application. Furthermore all the MOS cells of the transistors are not at the same temperature. This paper deals with a methodology that could allow taking into account the impact of the gate control and the MOS cells current distribution during 3D FEM electro-thermal simulations.

Słowa kluczowe

EN

electrothermal simulations; reliability; 3D FEM simulation

PL

symulacje elektrotermiczne; niezawodność; symulacja metodą elementów skończonych 3D

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2013
• Tom: Vol. 4, nr 4
• Strony: 148--152
• Opis fizyczny: Bibliogr. 6 poz.

Twórcy

autor

Marcault E

• CNRS, LAAS, 7 avenue du colonel Roche, F-31400 Toulouse, France
• Université de Toulouse, LAAS, F-31400 Toulouse, France

autor

Tounsi P.

• CNRS, LAAS, 7 avenue du colonel Roche, F-31400 Toulouse, France
• Université de Toulouse, INSA, LAAS, F-31400 Toulouse, France

autor

Massol J.-L

• CNRS, LAAS, 7 avenue du colonel Roche, F-31400 Toulouse, France
• Université de Toulouse, LAAS, F-31400 Toulouse, France

autor

Dorkel J.-M

• CNRS, LAAS, 7 avenue du colonel Roche, F-31400 Toulouse, France
• Université de Toulouse, INSA, LAAS, F-31400 Toulouse, France

Bibliografia

• [1] J.B. Sauveplane, P. Tounsi, A. Deram, E. Scheid, X. Chauffleur, "Smart 3-D Finite-Element Modeling for the Design of Ultra-Low On-Resistance MOSFET", Advanced Packaging, IEEE Transactions on, vol. 30, no.4, pp.789-794, Nov. 2007
• [2] E. Marcault, M. Breil, A. Bourennane, P. Tounsi, D. Martineau, P. Dupuy, "Impact of source metallization ageing on thermo-mechanical characteristics of a vertical power device", Power Electronics and Applications (EPE 2011), Proceedings of the 20]]-14th European Conference on , vol., no., pp.1-7, Aug. 30 2011-Sept. 1 2011
• [3] H. Dia, J.B. Sauveplane, P. Tounsi, J.-M. Dorkel, "A temperature-dependent power MOSFET model for switching application", Thermal Investigations of ICs and Systems, 2009. THERMINIC 2009. 15th International Workshop on , vol., no., pp.87-90, 7-9 Oct. 2009
• [4] D. Martineau, T. Mazeaud, M. Legros, Ph. Dupuy; C. Levade, G. Vanderscaeve, ”Characterization of ageing failures on power MOSFET devices by electron and ion microscopies”, Microelectronics and reliability; 2009, vol. 49, n° 9-11
• [5] E. Marcault, J.L. Massol, P. Tounsi, J.-M. Dorkel, “Distributed electrothermal modeling methodology for MOS gated power devices simulations”, 20th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) 2013
• [6] COMSOL® version 4.3a user guide concerning circuit module, 2012