PL EN


Preferencje help
Widoczny [Schowaj] Abstrakt
Liczba wyników
Tytuł artykułu

Hardware Trojans detection in chaos-based cryptography

Treść / Zawartość
Identyfikatory
Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
The paper deals with the security problems in chaotic-based cryptography. In particular, the 0–1 test for chaos is used to detect hardware Trojans in electronic circuits – generators of chaotic bit sequences. The proposed method of detecting hardware Trojans is based on analyzing the original bit sequences through the 0–1 test yielding a simple result, either a number close to 1, when the examined bit sequence is chaotic, or a number close to 0, when the sequence is non-chaotic. A complementary result is a graph of translation variables qc and pc which form a basis of the 0–1 test. The method does not require any extra corrections and can be applied to relatively short sequences of bits. This makes the method quite attractive as the security problems are dealt with at the chaotic generator level, with no need to apply any extractors of randomness. The method is illustrated by numerical examples of simulated Trojans in chaotic bit generators based on the analog Lindberg circuit as well as a discrete system based on the logistic map.
Rocznik
Strony
725--732
Opis fizyczny
Bibliogr. 25 poz., rys., wykr.
Twórcy
autor
  • Poznan University of Technology, Department of Computer Science, 3A Piotrowo St., 61-138 Poznan, Poland
autor
  • Poznan University of Technology, Department of Computer Science, 3A Piotrowo St., 61-138 Poznan, Poland
autor
  • Rutgers University, Department of Mathematics, 110 Frelinghuysen Road, Piscataway, NJ 08854, USA
Bibliografia
  • [1] M.E. Yalcin, J.A.K. Suykens, and K. Vandewalle, “True random bit generation from a double-scroll attractor”, IEEE Trans. Circuits and Systems I: Regular Papers 50, 1395–1404 (2004).
  • [2] L. Kocarev and L. Shiguo (Eds.), Chaos-Based Cryptography. Theory, Algorithms and Applications, Springer 2011.
  • [3] K.J. Persohn and R.J Povinelli, “Analyzing logistic map pseudorandom number generators for periodicity inducted by finite precision floatingpoint representation”, Chaos, Solitions and Fractals, 45, 23–244 (2012).
  • [4] P. Sniatala, J. Pierzchlewski, A. Handkiewicz, and B. Nowakowski, “CPLD based development board for mixed signal chip testing”, 14th Int. Conf. Mixed Design of Integrated Circuits and Systems, 21‒24 June, 2007, pp. 492–495, Gdynia, Poland.
  • [5] M. Melosik and W. Marszalek, “A hybrid chaos-based pseudorandom bit generator in VHDL-AMS”, IEEE 57th Int. Midwest Symp. Circuits and Syst. (MWSCAS), 2014, pp. 435–438, College Station, TX, USA.
  • [6] S. Ghosh, A. Basak, and S. Bhunia, “How secure are printed circuit boards against trojan attacks?”, IEEE Design and Test 32, 7–16 (2014).
  • [7] S. Bhunia et al., “Hardware Trojan attacks: threat analysis and countermeasures”, Proc. IEEE, 102, 1229–1247 (2014).
  • [8] Y. Jin and M. Yiorgos, “Hardware Trojans in wireless cryptographic ICs”, IEEE Design and Test of Computers 27, 26–35 (2010).
  • [9] X. Zhang and M. Tehranipoor, “Case study: detecting hardware Trojans in third-party digital IP cores”, IEEE Int. Symp. Hardware-Oriented Security and Trust (HOST), doi:10.1109/HST.2011.5954998, 2011.
  • [10] T. Reece and W. H. Robinson, “Detection of hardware trojans in third-party intellectual property using untrusted modules”, IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems 35, 357–366 (2015).
  • [11] M. Tehranipoor and C. Wang, Introduction to Hardware Security and Trust, Springer, Berlin, 2011.
  • [12] E. Lindberg, K. Murali, and A. Tamasevicius, “The smallest transistor-based nonautonomous chaotic circuit”, IEEE Trans. Circuits and Systems-II: Express Briefs 52, 661–664 (2005).
  • [13] W. Marszalek and Z.W. Trzaska, “Mixed-mode oscillations in a modified Chua’s circuit”, Circuits Syst. Signal Process. 29, 1075–1087 (2010).
  • [14] W. Marszalek and Z.W. Trzaska, “Memristive circuits with steady-state mixed-mode oscillations”, Electr. Lett. 50 (18), 1275–1277 (2014).
  • [15] H. Podhaisky and W. Marszalek, “Bifurcations and synchronization of singularly perturbed oscillators: an application case study”, Nonl. Dynamics 69 (3), 949–959 (2012).
  • [16] G.A. Gottwald and I. Melbourne, “A new test for chaos in deterministic systems”, Proc. Royal Soc. London 460, 603–611 (2003).
  • [17] G.A. Gottwald and I. Melbourne, “On the implementation of the 0‒1 test for chaos”, SIAM J. Appl. Dyn. Syst., 8, 129–145 (2009).
  • [18] M. Melosik and W. Marszałek “On the 0/1 test for chaos in continous systems”, Bull. Pol. Ac.: Tech 64 (3), 521–528 (2016).
  • [19] D. Bernardini and G. Litak, “An overview of 0‒1 test for chaos”, J. Braz. Soc. Mech. Sci. Eng., DOI :10.1007/s40430‒015‒0453- y (2015).
  • [20] G. Litak, A. Syta, and M. Wiercigroch, “Identification of chaos in a cutting process by the 0‒1 test”, Chaos, Solitons and Fractals, 40, 2095–2101 (2009).
  • [21] G. Litak, A. Syta, M. Budhraja, and I.M. Saha, “Detection of the chaotic behaviour of a bouncing ball by the 0‒1 test”, Chaos, Solitons and Fractals 42, 1511–1517 (2009).
  • [22] G. Litak, D. Bernardini, A. Syta, G. Rega, and A. Rysak, “Analysis of chaotic non-isothermal solutions of thermomechanical shape memory oscillators”, Eur. Phys. J. Spec. Top. 222, 1637–1647 (2013).
  • [23] L. Zachilas and I. Psarianos, “Examining the chaotic behavior in dynamical systems by means of the 0‒1 test”, J. Appl. Math., 2012, 681296 (2012).
  • [24] I. Falconer, G.A. Gottwald, I. Melbourne and K. Wormnes, “Application of the 0–1 test for chaos to experimental data”, SIAM J. Appl. Dyn. Syst. 6, 395–402 (2007).
  • [25] J. Fouda, B. Bodo, S. Sabat, and J. Effa, “A modified 0–1 test for chaos detection in oversampled time series observations”, Int. J. Bifurc. Chaos 24, 1450063 (2014).
Uwagi
PL
Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę (zadania 2017).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-733e1d0f-f130-4d94-a4fe-28497e478141
JavaScript jest wyłączony w Twojej przeglądarce internetowej. Włącz go, a następnie odśwież stronę, aby móc w pełni z niej korzystać.