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Basic Aspects of Designing a High-performance Processor Structure for Calculating a "true" Discrete Fractional Fourier Transform

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Języki publikacji
EN
Abstrakty
EN
This paper presents a basic aspects of structural design of the highperformance processor for implementation of discrete fractional Fourier transform (DFrFT). The general idea of the possibility of parallelizing the calculation of the so-called “true” discrete Fourier transform on the basis of our previously developed algorithmic approach is presented. We specifically focused only on the general aspects of the organization of the structure of such a processor, since the details of a particular implementation always depend on the implementation platform used, while the general idea of constructing the structure of the processor remains unchanged.
Wydawca
Rocznik
Strony
43--45
Opis fizyczny
Bibliogr. 17 poz., rys., tab., wzory
Twórcy
autor
  • West Pomeranian University of Technology, Szczecin, 49 Żołnierska St., 71-210 Szczecin, Poland
  • West Pomeranian University of Technology, Szczecin, 49 Żołnierska St., 71-210 Szczecin, Poland
Bibliografia
  • [1] Ozaktas H. M., Zalevsky Z. and Kutay M. A.: The Fractional Fourier Transform with Applications in Optics and Signal Processing. Wiley, Chichester, 2001.
  • [2] Ozaktas H. M., Ankan O., Kutay M. A., Bozdagi G.: Digital computation of the fractional Fourier transform. IEEE Trans. Signal Process. 1996, 44(9), pp. 2141-2150. doi:10.1109/78.536672.
  • [3] Pei S. C., Yeh M. H.: Discrete fractional Fourier transform. in: Proc. IEEE Internat. Symp. on Circuits and Systems, 1996, pp. 536-539.
  • [4] Jindal N., Singh K.: Image and video processing using discrete fractional transforms. Signal, Image and Video Processing 8(8), 1543-1553 (2014). doi:10.1007/s11760-012-0391-4.
  • [5] El-Mashed M. G., Zahran O., Dessouky M. I., El-Kordy M., Abd El- Samie F.E.: Synthetic aperture radar imaging with fractional Fourier transform and channel equalization, Digital Signal Processing, 2013, vol. 23, No. 1, pp. 151-175.
  • [6] Djurovic I., Stankovic S., Pitas I.: Digital watermarking in the fractional Fourier transformation domain. J Network and Computer Appl, 2001, 24, pp. 167-173.
  • [7] Pei S. C., Ding J. J.: Closed-form discrete fractional and affine Fourier transforms. IEEE Trans. Signal Process, 2000, 48(5), pp. 1338-1353. doi:10.1109/78.839981.
  • [8] Bultheel A., Martinez-Sulbaran H. E.: Computation of the Fractional Fourier Transform. Applied and Computational Harmonic Analysis.2004, 16(3), pp. 182-202.
  • [9] Irfan M., Zheng M. L., Shahzad H.: Review of computing algorithms for discrete fractional Fourier transform 2013, 6(11), pp. 1911-1919.
  • [10] Tao R., Liang G., Zhao X.: An efficient FPGA-based implementation of fractional Fourier transform algorithm, J. Signal Processing Systems 60(1), 47-58 (2010). doi:10.1007/s11265-009-0401-0A.
  • [11] Prasad M. V. N. V., Ray K. C. and Dhar A. S.: FPGA implementation of Discrete Fractional Fourier Transform, in Proc. IEEE Int. Conf. Signal Processing and Communication (IEEE-SPCOM), Bangalore, 2010, pp. 1-5.
  • [12] Ray K. Ch., Prasad M. V. N. V., Dhar A. S.: An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform. Journal of Signal Processing Systems. 2017. pp. 1–12.
  • [13] Majorkowska-Mech D., Cariow A.: A Low-Complexity Approach to Computation of the Discrete Fractional Fourier Transform, Circuits, Systems, and Signal Processing, 2017, 36 (10), pp. 4118-4144.
  • [14] Majorkowska-Mech D., Cariow A.: An algorithm for computing the “true" discrete fractional Fourier transform. Advances in Soft and Hard Computing. 2018(in print).
  • [15] Cariow A.: Strategies for the Synthesis of Fast Algorithms for the Computation of the Matrix-vector Products. Journal of Signal Processing Theory and Applications 3(1), 1-19 (2014). doi:10.7726/jspta.2014.1001.
  • [16] Granata J., Conner M., Tolimieri R.: The Tensor product: A mathematical programming language for FFTs and other fast DSP operations., IEEE Signal Processing Magazine, 1992. No. 1, pp. 41-48.
  • [17] Regaliat P. A. and Mitra S. K.: Kronecker Products, Unitary Matrices and Signal Processing Applications, Siam Review, 1989, 31, No. 4, pp. 586-613.
Uwagi
PL
Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2019).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-7262083a-f2d2-48ed-ac90-e1886bbbd817
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