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Qucs equation-defined and Verilog-A higher order behavioral device models for harmonic balance circuit simulation

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EN
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EN
This paper is concerned with the development and evaluation of a number of modeling techniques which improve Qucs Harmonic Balance simulation performance of RF compact device models. Although Qucs supports conventional SPICE semiconductor device models, whose static current/voltage and dynamic charge characteristics exhibit second and higher order derivatives may not be continuous, there is no guarantee that these will function without Harmonic Balance simulation convergence problems. The same comment also applies to a number of legacy compact semiconductor device models. The modeling of semiconductor devices centered on non-linear Equation-Defined Devices and blocks of Verilog-A code, combined with linear components, is introduced. These form a class of compact macromodel that has improved Harmonic Balance simulation performance. To illustrate the presented modeling techniques RF diode, BJT and MESFET macromodels are described and their Harmonic Balance performance simulated with Qucs and Xyce©.
Twórcy
autor
  • Centre for Communications Technology, London Metropolitan University, UK
autor
  • Department of Electronic Engineering, Bauman Moscow State Technical University, Kaluga branch, Russia
Bibliografia
  • [1] S. Jahn and M. Brinson, “Interactive compact modeling using qucs equation-defined devices,” Int. J. Numer. Model, vol. 21, pp. 335 – 349, 2008.
  • [2] G. J. Coram, “How to (and how not to) write a compact model in veriloga.” San Jos´e, Calfornia: IEEE International Behavioural Modeling and Simulation Conference (BMAS), October 2004, pp. 97 – 106.
  • [3] (2011) Mems daiq=mems design and analysis interface to qucs. Toshi Lab. (Optical and RF-MEMS Lab). [accessed March 2015]. [Online]. Available: http://toshi.iis.u-tokyo.ac.jp/toshilab/?DAIQ
  • [4] L. Lemaitre, W. Grabinski, and C. McAndrew, “Compact device modeling using verilog-a and adms,” Electron Technology Internet Journal, vol. 35, pp. 1 – 5, 2003.
  • [5] L. Lemaitre, G. J. Coram, C. McAndrew, and K. Kundert, “Extensions to verilog-a to support compact device modeling.” IEEE International Behavioral Modeling and Simulation Conference, BMAS-03, October 2003, pp. 134 – 138.
  • [6] S. A. Maas, Nonlinear Microwave and RF Circuits, second edition ed. Boston and London: Artech House, 2003.
  • [7] (2015) Xyce parallel electronic simulator: version 6.2. Sandia National Laboratories. Accessed March 2015. [Online]. Available: https://xyce.sandia.gov/
  • [8] M. Brinson, R. Crozier, V. Kuznetsov, C. Novak, B. Roucaries, F. Schreuder, and G. B. Torri. (March) Qucs: Improvements and new directions in the gpl compact device modelling and circuit simulation tool. MOS-AK Workshop, Grenoble. [Online]. Available: http://www.mos-ak.org/grenoble\ 2015/presentations/ T4 Brinson\ MOS-AK Grenoble\ 2015.pdf
  • [9] H. V. Paolo Nenzi. (2015) Ngspice users manual version 26. Accessed July 2015. [Online]. Available: http://ngspice.sourceforge.net/ docs/ngspice26-manual.pdf
  • [10] B. Eaton J.W. and H. S., GNU Octave Manual Version 3. London, UK: Network Theory Limited, 2008.
  • [11] P. Anongnetti and G. Massobrio, Semiconductor Devise Modeling with SPICE. New York: McGrew-Hill Inc., 1988.
  • [12] HSMS-282x Surface Mount RF Schottky Barrier Diodes data sheet, Av02-1320EN, Avago Technologies, May 28, 2009.
  • [13] V. Kuznetsov. (2015) Qep: Qucs schematic simulation with ngspice. [Online]. Available: https://github.com/Qucs/qucs/wiki/QEP
  • [14] A. Newton, D. O. Pederson, and A. Sangiovanni-Vincentelli, SPICE Version 2g User’s Guide. Berkeley, CA: Department of Electrical Engineering and Computer Sciences, University of California, 1981.
  • [15] B. Johnson, T. Quarles, A. R. Newton, D. O. Pederson, and A. Sangiovanni-Vincentelli, SPICE3 Version 3f User’s Manual. Berkeley, CA: Department of Electrical Engineering and Computer Sciences, University of California, 1992.
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Bibliografia
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bwmeta1.element.baztech-7003d708-740f-43f1-8609-4ec423cc34a4
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