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Versatile low-output-resistance low-voltage current-to-voltage analog converter

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Języki publikacji
EN
Abstrakty
EN
The paper presents a simple low-voltage transresistor attractive for on-chip analog-signal-processing. The proposed circuit offers not only an almost rail-to-rail operation and quite good linearity of DC transfer characteristic but also reasonably low value of its output resistance. This enables a voltage mode operation even if the transresistor is loaded by a not necessarily very high loading resistance. The obtained result is due to adding to the transresistor-input-stage a simple rail-to-rail voltage follower. The presented solution is an original proposal of the author. Input stage of the transresistor is built of only 4 MOS transistors and creates a simple quasi-linear current-to-voltage convertor. Output stage of it is built of 9 MOS transistors, plays a role of a very precise atypical voltage follower. In respect of simplicity and headroom, the proposed follower is better than conventional OA-based voltage followers. Preliminary simulation results are in a good agreement with the theory presented.
Twórcy
autor
  • Faculty of Telecommunication, Computer Science & Electrical Engineering, University of Technology and Life Sciences, Bydgoszcz, Poland
Bibliografia
  • [1] E. Vittoz, “Micropower techniques” in design of analog-digital VLSI circuits for telecommunications and signal processing”, Edit. J. Franca and Y. Tsividis, Prentice Hall, 1993.
  • [2] W. Machowski, S. Kuta, J. Jasielski, J. Kołodziejski, “Fast low voltage analog four-quadrant multipliers based on CMOS inverters”, International Journal of Electronics and Telecommunications, vol. 56, no. 4, s. 381-386, 2010.
  • [3] R. Wojtyna, “Analog-technique-based neuroprocessing implemented in hardware”, IEEE Workshop SPA 2009 (Signal Processing – Algorithms, Architectures, Arrangements and Applications), pp. 9-12, 2009.
  • [4] R. Długosz, T. TalaĞka, W. Pedrycz, R. Wojtyna, “Realization of the Conscience Mechanism in CMOS Implementation of Winner-Takes-All Self-Organizing Neural Networks”, IEEE Trans. Neural Networks, Vol. 21, No. 6, pp.961-971, 2010.
  • [5] R. Wojtyna, “Differential-pair-based Current-mode Analog Signal Processing”, International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES), pp. 585-588, ToruĔ 2015.
  • [6] M. Schlarmann, R. L.Geiger, “Simple CMOS Transresistor”, Electronics Letters, Vol. 37, Issue 23. pp. 1386-1387, 2001.
  • [7] R. Wojtyna, T. TalaĞka, “Transresistance CMOS neuron for adaptive neural networks implemented in hardware”, Bulletin of the Polish Academy of Sciences, Technical Sciences, Vol. 54, No. 4, pp. 443-448, 2006.
  • [8] K. Gupta, B.P. Singh, R. Choudhary, “Design and Analysis of Currentto-Voltage and Voltage-to-Current Converters using 0.35um technology”, International Journal of Emerging and Advanced Engineering, Vol. 2, Issue 4, April 2012.
  • [9] Texas Instruments, “AN-1244 photo-diode current–to-voltage converters”, Application Report SNOA423B-August 2002 - Revised May 2013.
  • [10] S. Narayanan, “Transresistor Distortion analysis using Volterra series representation”, The Bell Syst. Tech. Journal, vol. 46, May-June 1967, pp. 991-1119.
  • [11] W. J. Rough, “Nonlinear system theory: the Volterra/Winner approach”, Johns Hopkins Univ. Press Baltimore (MD) 1981.
  • [12] A. Borys, “An Analysis of slew-induced distortion in single –amplifier active filers using the Volterra-Winner series technique”, Int. Journal of Circuits Theory and Application”, vol. 10, 1982, pp. 81-94.
  • [13] R. Wojtyna, „CMOS voltage buffer for extremely low supply operation”, Electron Technology Journal, pp. 288-292, Vol. 32, No. 3, ITE 1999.
  • [14] R. Wojtyna, “Low-voltage Quasi-linear Current-to-Voltage Analog Signal Processing”, International Conference MIXDES’2016, pp. 585- 588, Łódź, 2016.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-6a4fda86-0bc8-4555-a416-72d3baad1c25
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