Verilog-A inductor compact model for the efficient simulation of Class-D VCOs

• Autorzy: Fino M. H.
• Języki publikacji: EN

Abstrakty

EN

This paper presents the use of a Verilog-A compact model for integrated spiral inductors, for the simulation of Class-D CMOS oscillators. The model takes into consideration the geometric parameters characterizing the inductor layout, as well as the technological parameters. The accuracy of the model is checked against simulations with ASITIC simulator and limitations of the model are established. The model is integrated into Cadence environment, offering the designer the possibility to efficiently simulate radio frequency blocks considering the non-idealities of both the inductors and the transistors in nanometric technologies. The particular case for a class-D oscillator is illustrated.

Słowa kluczowe

EN

Verilog-A; RF modeling; tapered Inductor; Class D Oscillator

PL

Verilog-A; modelowanie RF; cewka indukcyjna; oscylator

• Wydawca: Lodz University of Technology. Department of Microelectronics and Computer Science
• Czasopismo: International Journal of Microelectronics and Computer Science
• Rocznik: 2016
• Tom: Vol. 7, nr 3
• Strony: 114--118
• Opis fizyczny: Bibliogr. 10 poz., rys., wykr.

Twórcy

autor

Fino M. H.

• FCT - Universidade Nova de Lisboa, Portugal

Bibliografia

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