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Design of a Class-D Audio Amplifier With Analog Volume Control for Mobile Applications

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EN
Abstrakty
EN
A class-D audio amplifier with analog volume control (AVC) for portable applications is proposed in this paper. The proposed class-D consist of two sections. First section is an analog volume control which consists of an integrator, an analog MUX and a programmable gain amplifier (PGA). The AVC is implemented with three analog inputs (Audio, Voice, FM). Second section is a driver which consists of a ramp generator, a comparator, a level shifter and a gate driver. The driver is designed to obtain a low distortion and a high efficiency. Designed with 0.18 um 1P6M CMOS technology, the class-D audio amplifier with AVC achieves a total root-mean-square (RMS) output power of 0.5W, a total harmonic distortion plus noise (THD+N) at the 8-Ω load less than 0.06% and a power efficiency of 90% with a total area of 1.74 mm2.
Twórcy
  • Sidi Mouhamed Ben Abbellah University, Dhar Mahraz Science Faculty, B.P.1796.Fez, Morocco
autor
  • Sidi Mouhamed Ben Abbellah University, Dhar Mahraz Science Faculty, B.P.1796.Fez, Morocco
Bibliografia
  • [1] D. Self, “Audio Power Amplifier Design Handbook”, Newnes, Oxford, UK, 4 the edition, 2006.
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  • [4] Van der Zee, Ronan A. R., and Ed van Tuijl, “A Power-Efficient Audio Amplifier Combining Switching and Linear Techniques,” IEEE Journal of Solid-State Circuits, vol. 34, pp. 985-987, July 1999.
  • [5] Choi, Soo-Chang, Jun-Woo Lee, Woo-Kang Jin, Jae-Hwan So, and Suki Kim, “A Design of a 10-W Single Chip Class D Audio Amplifier with Very High Efficiency using CMOS Technology,” IEEE Transactions on Consumer Electronics, vol. 45, pp. 465-473, August 1999.
  • [6] E. Gaalaas, B. Y. Liu and N. Nishimura, “Integrated Stereo Delta-Sigma Class D Amplifier,” IEEE ISSCC Dig. Tech. Papers, pp. 120-121, Feb., 2005.
  • [7] C-C. Hsu, and J-T. Wu,” A highly linear 125-MHz CMOS switched-resistor programmable-gain amplifier ” IEEE J. Solid-State Circuits, vol.38, no.10, Oct 2003, pp. 1663-1630
  • [8] I. D. Mosely, P. H. Mellor, C. M. Bingham, “Effect of dead time on harmonic distortion in Class-D audio power amplifiers”, Electronics Letters, 1999, vol. 35, pp. 950-952.
  • [9] Y. Choi, W. Tak, Y. Yoon, and J. Roh, “A 0.018% THD+N, 88-dB PSRR PWM Class-D. Amplifier for Direct Battery Hookup” IEEE J. Solid-Stat Circuits, vol. 47, no, 2. Fabruary 2012, pp. 454-463.
  • [10] L. Dooper and M. Berkhout, “A 3.4 W Digital-In Class-D Audio Amplifier in 0.14μm CMOS” IEEE J. Solid-State-Circuits, vol.47, no.7, july 2012. pp. 1524-1534.
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  • [12] K. Kang, J. Roh, Y. Choi, H. Roh, H. Nam, and S. Lee, “Class-D Audio Amplifier Using 1-Bit Fourth-Order. Delta-Sigma Modulation” IEEE Trans. Circuit Sys. II, vol. 55, no.8, august 2008. pp. 728-732.
  • [13] M. A. Rojas-Gonzálezand E. Sánchez- Sinencio, “Design of a class D audio amplifier IC using sliding mode control and negative feedback,” IEEE Trans. Consumer Electron., vol. 53, no. 2, pp.609–617, May 2007.
  • [14] M. A .Teplechuk, G. Anthony, and A. Christophe. “True Filterless Class-D Audio Amplifier” IEEE J. Solid-State-Circuits, vol. 46, no.12, december 2011. pp. 2784-2793.
  • [15] A. Matamura, N. Nishimura, and B. Y. Liu, “Filter less multi-level delta-sigma class-D amplifier for portable applications,” in Proc. ISCAS, May 2009, pp.1177–1180.
  • [16] W. Redman-White “A High Bandwidth Constant gm and Slew Rate Rail-to-Rail CMOS input circuit and its Application to Analog Cells for Low Voltage VLSI Systems”, IEEE Journal of Solid-State Circuits, vol. 32, no. 5, may 1997.
  • [17] “Analog MOS integrated circuits for signal processing” Gregorian & Temes April 1986.
  • [18] C. K. Lam, M. T. Tan, S. M. Cox and K. S. Yeo “ Class-D Amplifier Power Stage With PWM Feedback Loop ” IEEE Transactions on Power Electronics,vol.28, no.8, pp 3870-3881, August 2013.
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Uwagi
PL
Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-623251a1-8a00-409c-bd19-2b8ceef17774
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