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Extraction of an equivalent electrical circuit for SPICE simulation of substrate minority carriers propagation

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Języki publikacji
EN
Abstrakty
EN
This paper presents an equivalent electrical circuit for substrate minority carriers SPICE simulation. The electrical circuit parameters are extracted from substrate meshing applying the finite difference method. This model is derived from a linearization of drift-diffusion equations and not from the closed form solution. Further, the proposed circuit is solved with available SPICE simulators because of electrical analogies with physical quantities. As a result, the minority carrier diffusion current is included automatically in the total substrate current computation. SPICE simulation results are compared with device simulator results for the one and three-dimensional cases.
Twórcy
autor
  • Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland
autor
  • Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland
autor
  • Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland
autor
  • Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland
Bibliografia
  • [1] Bruno Murari. Power integrated circuits: problems, tradeoffs, and solutions. IEEE Journal of Solid-State Circuits, 13(3):307-319, 1978.
  • [2] F. Lo Conte, J. M Sallese, M. Pastre, F. Krummenacher, and M. Kayal. Global modeling strategy of parasitic coupled currents induced by minority-carrier propagation in semiconductor substrates. IEEE Transactions on Electron Devices, 57(1):263-272, 2010.
  • [3] F.L. Conte, J. M Sallese, M. Pastre, F. Krummenacher, and M. Kayal. Global 2D modeling of minority and majority substrate coupled currents. In Proceedings of the European Solid State Device Research Conference, pages 153-156, Sept 2009.
  • [4] R.M. Warner and B.L. Grung. Semiconductor-device Electronics. Adel S.Sedra. Holt, Rinehart and Winston, 1991.
  • [5] F.J.R. Clement, E. Zysman, M. Kayal, and M. Declercq. Layin: toward a global solution for parasitic coupling modeling and visualization. In Proceedings of the IEEE Custom Integrated Circuits Conference, pages 537-540, 1994.
  • [6] S. Selberherr. Analysis and Simulation of Semiconductor Devices. Springer-Verlag, 1984.
  • [7] M. Y. Al-Zeben, A. H. M. Saleh, and M. A. Al-Omar. TLM modelling of diffusion, drift and recombination of charge carriers in semiconductors. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 5(4):219 225, 1992.
  • [8] Jankovic N. D. Karamakkovic J. P. and Glozic D. B. Transmission-line equivalent curcuit model of minority carrier transient current in quasi-p[neutral silicon layers including effects. Int. J. Numer Model., 8:341-365, 1995.
  • [9] Camillo Stefanucci, Pietro Buccella, Maher Kayal, and Jean Michel Sallese. Optimization strategy of numerical simulations applied to epfi substrate model. In Proceedings of the 21st International Conference Mixed Design of Integrated Circuits Systems (MIXDES), pages 334-337, June 2014.
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Bibliografia
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