A proposal of output speed multiplication technique for true random number generators based on ring oscillators

• Autorzy: Matuszewski Ł. , Kubczak P.
• Języki publikacji: EN

Abstrakty

EN

Nowadays modern cryptographic systems require a tremendous amount of keys. Very fast random number generators (RNGs) are needed to produce those keys in the requested time, but what to do when a solution that is already in use reaches the maximum speed? The aim of the paper is to find the answer to this question. In addition, generated random numbers should not leave a cryptographic system, because according to the Kerckhoffs thesis, the security of the whole system should be based only on a key. The cryptographic system should be enclosed within a single chip. In order to check new ideas and prove them, there were used NIST 800-22 test suite and restarts mechanism. The basic concept of the generator built of ring oscillators is still the same; ring oscillators are combined by XOR gates tree. A single ring oscillator consists of inverter, latch and NAND. This kind of construction provides a tool to make synchronous start and stop of all oscillators and the restart mechanism technique is applied in this manner. The speed of generation was increased by using multiple parallel generator trees to generate instantly the whole n-bit word. The paper shows that reproduction of the base structure is not a simple method of increasing the speed of generator. Moreover, it is always important to carefully consider all new ideas, because even if the NIST statistical test suite is passed, there is a chance that the restart mechanism will show some correlations that can be used during attack on the system.

Słowa kluczowe

EN

true random number generator; ring oscillator; cryptography; field programmable gate array (FPGA); restart mechanism

• Wydawca: Wydawnictwo PAK
• Czasopismo: Measurement Automation Monitoring
• Rocznik: 2016
• Tom: Vol. 62, No. 5
• Strony: 157--159
• Opis fizyczny: Bibliogr. 8 poz., rys., tab., wykr.

Twórcy

autor

Matuszewski Ł.

• Poznan University of Technology, Faculty of Electronics and Telecommunications 3 Polanka St., 61-131 Poznań

autor

Kubczak P.

• Poznan University of Technology, Faculty of Electronics and Telecommunications 3 Polanka St., 61-131 Poznań

Bibliografia

• [1] Sunar B., Martin W. J., and Stinson D. R.: A provably secure true random number generator with built-in tolerance to active attacks. IEEE Trans., Comput., vol. 56, pp. 109-119, Jan. 2007.
• [2] Jessa M.: On the Quality of Random Sequences Produced with a Combined Random Bit Generator, IEEE Transactions on Computers, pp. 791 – 804, Volume 64, Issue 3, March 2015.
• [3] Wold K., and Petrović S.: Security properties of oscillator rings in true random number generators. Proc. of 15th International Symposium on Components, Circuits, Devices and Systems, pp. 145-150, 2012.
• [4] Bochard N., Bernard F., and Fischer V.: Observing the randomness in RO-based TRNG. Proc. of ReConFig 2009, 9-11 Dec. 2009, pp. 237-242.
• [5] Jessa M., and Jaworski M.: Randomness of a combined RBG based on the ring oscillator sampling method. Proc. of International Conference on Signals and Electronic Systems, ICSES’10, pp. 323-326, 2010.
• [6] Jessa M., Matuszewski L.: Enhancing the Randomness of a Combined True Random Number Generator Based on the Ring Oscillator Sampling Method, ReConFig’2011, Nov. 30 – Dec. 2, 2011, pp. 274-279.
• [7] Wold K. and Tan C. H.: Analysis and enhancement of random number generator in FPGA based on oscillator rings. Int. J. of Reconfiugurable Computing, vol. 2009, pp. 1-8, 2009.
• [8] Valtchanov B., Aubert A., Bernard F., and Fischer V.: Modeling and observing the jitter in ring oscillators implemented in FPGAs. In Proc. of IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS’08, pp. 1-6, 2008.

Uwagi

EN

The presented work has been funded by the Polish Ministry of Science and Higher Education within the status activity task 08/83/DSPB/4707 in 2016.