Synthesis of multiple-valued logic networks for FPGA implementation using developmental genetic programming

• Autorzy: Deniziak S. , Wiśniewski M. , Wieczorek K.
• Języki publikacji: EN

Abstrakty

EN

This paper presents a method of FPGA-oriented synthesis of multiple-valued logical networks. A multiple-valued network consists of modules connected by multivalued signals. During synthesis the modules are decomposed into smaller ones. For this purpose the symbolic decomposition is applied. Since the decomposition of modules strongly depends on the encoding of multiple-valued inputs and outputs, the result of synthesis depends on the order, in which the consecutive modules are implemented. Experimental results showed that our approach significantly reduces the cost of implementation.

Słowa kluczowe

EN

multiple-valued functions; FPGA; symbolic synthesis

• Wydawca: Wydawnictwo PAK
• Czasopismo: Measurement Automation Monitoring
• Rocznik: 2016
• Tom: Vol. 62, No. 8
• Strony: 278--281
• Opis fizyczny: Bibliogr. 9 poz., rys., schem., tab., wzory

Twórcy

autor

Deniziak S.

• Kielce University of Technology, Department of Computer Science, 7 Tysiaclecia Panstwa Polskiego Ave., 25-314 Kielce, Poland

autor

Wiśniewski M.

• Kielce University of Technology, Department of Computer Science, 7 Tysiaclecia Panstwa Polskiego Ave., 25-314 Kielce, Poland

autor

Wieczorek K.

• Kielce University of Technology, Department of Computer Science, 7 Tysiaclecia Panstwa Polskiego Ave., 25-314 Kielce, Poland

Bibliografia

• [1] M. Gao, J. H. Jiang, Y. Jiang, Y. Li, A. Mishchenko, S. Sinha, T. Villa, R. Brayton: Optimization of multi-valued multi-level networks, Proc. of the 32nd IEEE Int. Symp. on Multiple-Valued Logic, 2002.
• [2] S. Deniziak, M. Wisniewski: Symbolic functional decomposition of multivalued functions, Journal of Multiple-Valued Logic and Soft Computing, vol.24, no.5-6, pp.425-452, 2015.
• [3] J. A. Brzozowski, T. Łuba: Decomposition of boolean functions specified by cubes, Journal of Multiple-Valued Logic & Soft Computing, vol. 9, no.4, pp. 377-417, 2003.
• [4] L. Józwiak, A. Chojnacki: Effective and efficient FPGA synthesis through general functional decomposition, Journal of Systems Architecture, vol.49, issue 4-6, pp. 247–265, 2003.
• [5] J. A. Brzozowski, J. J. Lou: Blanket algebra for multiple-valued function decomposition, Proc. of the Intern. Workshop on Formal Languages and Computer Systems, in. Algebraic Engineering, C.L. Nehaniv and M. Ito, eds. World Scientific, pp. 262-276, 1999,
• [6] S. Deniziak, M. Wiśniewski: FPGA-based state encoding using symbolic functional decomposition, Electronics Letters, vol.46, no.19, pp.1316-1318, 2010.
• [7] S. Deniziak, M. Wiśniewski: A symbolic RTL synthesis for LUT-based FPGAs, Proc. of the IEEE Symposium on Design and Diagnostics of Electronic Circuits & Systems, pp. 102-107, 2009.
• [8] R. Keller, W. Banzhaf: The evolution of genetic code in genetic programming, Proc. of the Genetic and Evolutionary Computation Conf., pp. 1077–1082, 1999.
• [9] S. Deniziak and K. Wieczorek: Evolutionary optimization of decomposition strategies for logical functions, Proc. of ICAISC 2012, Lect. Notes in Comp. Science, vol. 7269, 2012, pp. 182-189.

Uwagi

PL

Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę (zadania 2017).