Administration-and communication-aware IP core mapping in scalable multiprocessor system-on-chips via evolutionary computing

• Autorzy: Guderian F. , Schaffer R. , Fettweis G.
• Języki publikacji: EN

Abstrakty

EN

In this paper, an efficient mapping of intellectual property (IP) cores onto a scalable multiprocessor system-on-chip with a k-ary 2-mesh network-on-chip is performed. The approach is to place more affine IP cores closer to each other reducing the number of traversed routers. Affinity describes the pairwise relationship between the IP cores quantified by an amount of exchanged communication or administration data. A genetic algorithm (GA) and a mixed-integer linear programming (MILP) solution use the affinity values in order to optimize the IP core mappings. The GA generates results faster and with a satisfactory quality relative to MILP. Realistic benchmark results demonstrate that a tradeoff between administration and communication affinity significantly improves application performance.

Słowa kluczowe

EN

intellectual property; IP; IP core; mapping; system-on-chips; mixed-integer linear programming; MILP; genetic algorithm; GA; administration; communication

• Wydawca: University of Social Sciences
• Czasopismo: Journal of Artificial Intelligence and Soft Computing Research
• Rocznik: 2012
• Tom: Vol. 2, No. 2
• Strony: 133--146
• Opis fizyczny: Bibliogr. 17 poz., rys.

Twórcy

autor

Guderian F.

• Vodafone Chair Mobile Communications Systems Technische Universitat Dresden, 01062 Dresden, Germany

autor

Schaffer R.

• Vodafone Chair Mobile Communications Systems Technische Universitat Dresden, 01062 Dresden, Germany

autor

Fettweis G.

• Vodafone Chair Mobile Communications Systems Technische Universitat Dresden, 01062 Dresden, Germany

Bibliografia

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