Heart-rate Monitoring System Design and Analysis Using a Nios II Soft-core Processor

• Autorzy: Lim C. K. , Jambek A.B. , Hashim U.

Identyfikatory

DOI

10.1515/eletel-2016-0039

• Języki publikacji: EN

Abstrakty

EN

The heart rate of a person is able to tell whether they are healthy. A heart-rate monitoring device is able to measure or record the heart rate of a person in real time, whether it is an electrocardiogram (ECG) or a photoplethysmogram (PPG). In this work, a microprocessor system loaded with a heart-rate monitoring algorithm is implemented. The microprocessor system is the Nios II processor system, which interfaces with an analogue-to-digital converter (ADC) and a pulse sensor. A beat-finding algorithm is used in the microprocessor system for heart rate measurement. An experiment is carried out to analyse the functionality of the microprocessor system loaded with the algorithm. The results show that the detected heart rate is in the range of the average human being’s heart rate. The signal flow within the microprocessor system is observed and analysed using SignalTap II from Quartus’ software. Based on a power analysis report, the proposed microprocessor system has a total power dissipation of around 218.26 mW.

Słowa kluczowe

EN

pulse sensor; PPG; heart rate; FPGA; Nios II

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2016
• Tom: Vol. 62, No. 3
• Strony: 283--288
• Opis fizyczny: Bibliogr. 8 poz., rys., tab., wykr.

Twórcy

autor

Lim C. K.

• School of Microelectronic Engineering, Universiti Malaysia Perlis, Perlis, Malaysia

autor

Jambek A.B.

• School of Microelectronic Engineering, Universiti Malaysia Perlis, Perlis, Malaysia

autor

Hashim U.

• Insituite of Nano Electronic Engineering, Universiti Malaysia Perlis, Perlis, Malaysia

Bibliografia

• [1] Y. Yang and K. Tang, “A Pulse Oximetry System with Motion Artifact Reduction Based on Fourier Analysis,” in IEEE International Symposium on Bioelectronics and Bioinformatics (IEEE ISBB 2014), Chung Li, 2014, pp. 1–4.
• [2] G. Guo, Z. Li, and F. Yang, “Design of High Speed Pulse Data Acquisition System Based on FPGA and USB,” in 2011 International Conference on Multimedia Technology, Hangzhou, 2011, pp. 5374-5376.
• [3] H. Liu, Y. Wang, and L. Wang, “FPGA-based Remote Pulse Rate Detection Using Photoplethysmographic Imaging,” in 2013 IEEE International Conference on Body Sensor Networks (BSN 2013), Cambridge, 2013, pp. 1-5.
• [4] P. An and M. Zeng, “Pulse Monitoring System Based on Feedback Algorithm,” in 2012 10th World Congress on Intelligent Control and Automation, Beijing, 2012, pp. 4211-4214.
• [5] Q. Gong, G. Li, P. Sun, and Y. Pang, “Design and Implementation of Pulse Signal Detection System Based on Bluetooth Transmission,” Int. J. Control Autom.., Vol. 8, No. 7, 2015 , pp. 141-148.
• [6] “8-Bit uP Compatible A/D Converters,” ADC0801/ADC0802/ADC0803/ADC0804/ADC0805 datasheet, National Semiconductor Corp., December 1994.
• [7] “Pulse Sensor Amped,” 2015. [Online]. Available: http://pulsesensor.com/pages/pulse-sensor-amped-arduino-v1dot1
• [8] “256-MBIT SYNCHRONOUS DRAM,” IS42S83200B datasheet, Integrated Silicon Solution, Inc., 2007.

Uwagi

PL

Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę.