Low-Power High-Speed Double Gate 1-bit Full Adder Cell

• Autorzy: Kumar R. , Roy S. , Bhunia C. T.

Identyfikatory

DOI

10.1515/eletel-2016-0045

• Języki publikacji: EN

Abstrakty

EN

In this paper, we proposed an efficient full adder circuit using 16 transistors. The proposed high-speed adder circuit is able to operate at very low voltage and maintain the proper output voltage swing and also balance the power consumption and speed. Proposed design is based on CMOS mixed threshold voltage logic (MTVL) and implemented in 180nm CMOS technology. In the proposed technique the most time-consuming and power consuming XOR gates and multiplexer are designed using MTVL scheme. The maximum average power consumed by the proposed circuit is 6.94μW at 1.8V supply voltage and frequency of 500 MHz, which is less than other conventional methods. Power, delay, and area are optimized by using pass transistor logic and verified using the SPICE simulation tool at desired broad frequency range. It is also observed that the proposed design may be successfully utilized in many cases, especially whenever the lowest power consumption and delay are aimed.

Słowa kluczowe

EN

low-power full-adder; low-power CMOS design; multiplexer based full-adder design; multi-threshold voltage based full-adder design; pass transmission logic

• Wydawca: Polish Academy of Sciences, Committee of Electronics and Telecommunication
• Czasopismo: International Journal of Electronics and Telecommunications
• Rocznik: 2016
• Tom: Vol. 62, No. 4
• Strony: 329--334
• Opis fizyczny: Bibliogr. 19 poz., tab., wykr.

Twórcy

autor

Kumar R.

• Department of ECE, National Institute of Technology Arunachal Pradesh, P.O. Yupia, Arunachal Pradesh, 791112, India

autor

Roy S.

• Department of ECE, National Institute of Technology Arunachal Pradesh, P.O. Yupia, Arunachal Pradesh, 791112, India

autor

Bhunia C. T.

• Department of CSE, National Institute of Technology Arunachal Pradesh, P.O. Yupia, Arunachal Pradesh, 791112, India

Bibliografia

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Uwagi

PL

Opracowanie ze środków MNiSW w ramach umowy 812/P-DUN/2016 na działalność upowszechniającą naukę.