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Tytuł artykułu

A new generalized basic structure for multilevel inverter with reduced power electronic components count

Wybrane pełne teksty z tego czasopisma
Identyfikatory
Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
This paper presents a new multilevel inverter topology which can generate all required numbers of levels at the output stage. The proposed topology is composed of six unidirectional switches, several bidirectional switches, and DC voltage sources. To add perspective, the proposed topology is compared with other topologies. The comparison shows that the proposed topology generates more voltage levels without the need for all excess number of switches and DC voltage sources. Moreover, the smaller number of switches in the current flow leads to decreased conductive loss in the proposed topology. To assure the proposed topology operates correctly, it is simulated with the aid of PSCAD/EMTDC software and the results are discussed.
Rocznik
Strony
96--107
Opis fizyczny
Bibliogr. 27 poz., rys., tab., wykr.
Twórcy
  • University of Tabriz, lslamic Republic of Iran
Bibliografia
  • [1] M. R. Banaei, M.R. Jannati Oskuee, and H. Khounjahan, "Reconfiguration of semi-cascaded multilevel inverter to improve systems performance parameters" JET Power Electron., vol. 7, no. 5, pp. 1106-1112, May 2014.
  • [2] W. Li et al., "Capacitor voltage balance control of five-level modular composited converter with hybrid space vector modulation," IEEE Trans. Power Electron., vol. 33, no. 7, pp. 5629-5640, July 2018.
  • [3] M.R. Jannati Oskuee, E. Salary, and S. Najafi-Ravadanegh. "Creative design of symmetric multilevel converter to enhance the circuit's performance," JET Power Electron., vol. 8, no. 1, pp. 96-102, Jan. 2015.
  • [4] E. Zarniri, N. Vosoughi, S.H. Hosseini, R. Barzegarkhoo, and M. Sabahi, "A new cascaded switched capacitor multilevel inverter based on improved series-parallel conversion with less number of components," IEEE Trans. lnd. Electron., vol. 63, no. 6, pp. 3582-3594, June 2016.
  • [5] M. Toupchi Khosroshahi, "Crisscross cascade multilevel inverter with reduction in number of components," lET Power Electron., vol. 7, no. 12, pp. 2914-2924, Dec. 2014.
  • [6] M.R. Jannati Oskuee, M. Karimi, S.N. Ravadanegh, and G.B. Gharehpetian, "An innovative scheme of symmetric multilevel voltage source inverter with lower number of circuit devices," IEEE Trans. lnd. Electron., vol. 62, no. 11, pp. 6965-6973, Nov. 2015.
  • [7] M. Saeedian, J.A. Firouzjaee, and M. Hosseini, "A cascaded multilevel inverter based on symmetric-asymmetric DC sources with reduced number of components," IET Power Electron., vol. 10, no. 12, pp. 1468-1478, Oct. 2017.
  • [8] R. Shalchi Alishah, S.H. Hosseini, E. Babaei, and M. Sabahi, "Optimization assessment of a new extended multilevel converter topology," IEEE Trans. lnd. Electron., vol. 64, no. 6, pp. 4530-4538, June 2017.
  • [9] E. Sarnadaei, A. Sheikholeslarni, S.A Gholarnian, and J. Adabi, "A Square T-Type (ST-Type) Module for Asymmetrical Multilevel Inverters," IEEE Trans. Power Electron., vol. 33, no. 2, pp. 987-996, Feb. 2018.
  • [10] E. Babaei, S. Laali, and Z. Bayat, "A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches," IEEE Trans. Ind. Electron., vol. 62, no. 2, pp. 922-929, Feb. 2015.
  • [11] A. Ajarni,A. Mokhberdoran,, M.R. Jannati Oskuee, and M. Toopchi Khosroshahi, "Cascade-multi cell multi level converter with reduced number of switches," JET Power Electron., vol. 7, no. 3, pp. 552-558, March 2014.
  • [12] R. Shalchi Alishah, S.H. Hosseini, E. Babaei and M. Sabahi, "A new general multilevel converter topology based on cascaded connection of sub multilevel units with reduced switching components, DC sources, and blocked voltage by switches." IEEE Trans.lnd. Electron, vol. 63, no. 11, pp. 7157-7164, Nov. 2016.
  • [13] K.K. Gupta and S. Jain, "A multilevel Voltage Source Inverter (VSI) to maximize the number of levels in output waveform." Electr. Power Energy Syst, vol. 44, no. 1, pp. 25-36, Jan. 2013.
  • [14] K.K. Gupta and S. Jain, "A novel multilevel inverter based on switched DC sources," IEEE Trans. Ind. Electron., vol. 61, no. 7, pp. 3269-3278, July 2014.
  • [15] W.K. Choi and F.S. Kang, "H-bridge based multilevel inverter using PWM switching function," in Proc. ENTELEC, 2009, pp. 1-5.
  • [16] A. Ajami, M.R. Jannati Oskuee, A. Mokhberdoran and A. Van den Bossche, "Developed cascaded multilevel inverter topology to minimize the number of circuit devices and voltage stresses of switches," IET Power Electron., vol. 7, no. 2, pp. 459-466, Feb. 2014.
  • [17] E. Babaei. S.H. Hosseini, G.B. Gharehpetian, M. Tarafdar Hague, and M. Sabahi, "Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology," Elsevier J. Electr. Power Syst. Res, vol. 77, no. 8, pp. 1073-1085, Jun. 2007.
  • [18] R. Shalchi Alishah, S.H. Hosseini, E. Babaei, and M. Sabahi, "Optimal design of new cascaded switch-ladder multilevel inverter structure," IEEE Trans. Ind. Electron., vol. 64, no. 3, pp. 2072-2080, March 2017.
  • [19] E. Samadaei, S.A. Gholamian, A. Sheikholeslami, and J. Adabi, "An envelope type (E-Type) module: Asymmetric multilevel inverters with reduced components," IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7148-7156, Nov. 2016.
  • [20] M. Farhadi Kangarlu and E. Babaei, "Cross-switched multilevel inverter: An innovative topology," JET Power Electron., vol. 6, no. 4, pp. 642-651, April 2013.
  • [21] E. Babaei, M. Farhadi Kangarlu, and F. Najaty Mazgar, "Symmetric and asymmetric multilevel inverter topologies with reduced switching devices," Electr. Power Syst. Res, vol. 86, pp. 122-130, May 2012.
  • [22] E. Babaei and S.H. Hosseini, "New cascaded multileveI inverter topology with minimum numer of switches," Elsevier J. Energy Conv. Manage.. vol. 50, no. 11, pp. 2761-2767, Nov. 2009.
  • [23] G. Waltrich and I. Barbi, "Three-phase cascaded multilevel inverter using power cells with two inverter legs in series" IEEE Trans. Ind. Appl., vol. 57, no. 8, pp. 2605-2612, Aug. 2010.
  • [24] Y. Hinago and H. Koizumi, "A single-phase multilevel inverter using switched series/parallel dc voltage sources," IEEE Trans. End. Electron., vol. 57, no. 8, pp. 2643-2650, Aug. 2010.
  • [25] A. Ajami, A. Mokhberdoran and M.R. Jannati Oskuee, "A new topology of multilevel voltage source inverter to minimize the number of circuit devices and maximize the number of output voltage levels," J. Elect. Eng. Tech., vol. 8, no. 6, pp. 1321-1329, Aug. 2013.
  • [26] E. Babaei, S. Laali, and S. Alilu, "Cascaded multilevel inverter with series connection of novel H bridge basic units," IEEE Trans. Ind. Electron., vol. 61, no. 12, pp. 6664-6671, Dec. 2014.
  • [27] J. Ebrahimi, E. Babaei, and G.B. Gharehpetian, "A new multilevel converter topology with reduced number of power electronic components," IEEE Trans. Ind. Electron., vol. 59, no. 2, pp. 655-667, Feb. 2012.
Uwagi
PL
Opracowanie rekordu ze środków MEiN, umowa nr SONP/SP/546092/2022 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2022-2023).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-3b0ed0e0-e6f8-41f9-ad08-70cbd16335af
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