Analiza maskowania zwarć w sieci połączeń przez rejestr MISR

• Autorzy: Garbolino Tomasz

Identyfikatory

DOI

10.15199/48.2024.12.59

Warianty tytułu

EN

Analysis of masking of shorts in the network of connections by the MISR-based test response compactor

• Języki publikacji: PL

Abstrakty

PL

W artykule dokonano analizy maskowania zwarć w sieci połączeń między modułami cyfrowego systemu scalonego, którego źródłem jest proces kompakcji ciągów odpowiedzi testowych zachodzący w klasycznym rejestrze MISR o liniowym sprzężeniu zwrotnym opisanym wielomianem pierwotnym. Uszkodzenia, które wzięto pod uwagę to jedno- i dwukrotne zwarcia typu summa montażowa dwóch linii. Do pobudzania wejść badanej sieci połączeń wykorzystano powszechnie stosowaną prostą/zanegowaną sekwencję liczącą T/C. W artykule zdefiniowano warunki wzajemnego kasowania się ciągów błędów w rejestrze MISR, które prowadzi do maskowania zwarć w sieci połączeń. Przypadki maskowania uszkodzeń zilustrowano przykładami oraz potwierdzono eksperymentalnie.

EN

This paper analyses the masking of shorts (bridges) in the interconnection network between cores of a digital SoC caused by the compaction process of test response sequences having a place in a classical MISR with linear feedback described by a primitive polynomial. The faults considered are single and double wired-OR type shorts of two lines. A commonly used True/Complement Counting Sequence (T/C) was used to stimulate the inputs of the interconnection network under test. This paper defines the conditions for the mutual cancellation of error sequences in MISR, which leads to the masking of shorts between lines of the interconnection network. The cases of fault masking are illustrated with examples and confirmed experimentally

Słowa kluczowe

PL

wbudowane samotestowanie połączeń; rejestr MISR; kompakcja; maskowanie błędów; maskowanie uszkodzeń

EN

Interconnect Built-In Self-Test; IBIST; multi-input signature registe; MISR; compaction; error aliasing; fault masking

• Wydawca: Wydawnictwo SIGMA-NOT
• Czasopismo: Przegląd Elektrotechniczny
• Rocznik: 2024
• Tom: R. 100, nr 12
• Strony: 272--280
• Opis fizyczny: Bibliogr. 47 poz., rys., tab.

Twórcy

autor

Garbolino Tomasz

• Politechnika Śląska, Katedra Systemów Cyfrowych, Wydział Automatyki, Elektroniki i Informatyki, ul. Akademicka 16, 44-100 Gliwice

• https://orcid.org/0000-0002-3682-2220

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Uwagi

Opracowanie rekordu ze środków MNiSW, umowa nr POPUL/SP/0154/2024/02 w ramach programu "Społeczna odpowiedzialność nauki II" - moduł: Popularyzacja nauki i promocja sportu (2025).