A Survey on Fault-Tolerant Methodologies for Deep Neural Networks

• Autorzy: Syed Rizwan Tariq , Ulbricht Markus , Piotrowski Krzysztof , Krstic Milos

Identyfikatory

DOI

10.14313/PAR_248/89

Warianty tytułu

PL

Przegląd metod zapewniających odporność na błędy dla głębokich sieci neuronowych

• Języki publikacji: EN

Abstrakty

EN

Asignificant rise in Artificial Intelligence (AI) has impacted many applications around us, so much so that AI has now been increasingly used in safety-critical applications. AI at the edge is the reality, which means performing the data computation closer to the source of the data, as opposed to performing it on the cloud. Safety-critical applications have strict reliability requirements; therefore, it is essential that AI models running on the edge (i.e., hardware) must fulfill the required safety standards. In the vast field of AI, Deep Neural Networks (DNNs) are the focal point of this survey as it has continued to produce extraordinary outcomes in various applications i.e. medical, automotive, aerospace, defense, etc. Traditional reliability techniques for DNNs implementation are not always practical, as they fail to exploit the unique characteristics of the DNNs. Furthermore, it is also essential to understand the targeted edge hardware because the impact of the faults can be different in ASICs and FPGAs. Therefore, in this survey, first, we have examined the impact of the fault in ASICs and FPGAs, and then we seek to provide a glimpse of the recent progress made towards the fault-tolerant DNNs. We have discussed several factors that can impact the reliability of the DNNs. Further, we have extended this discussion to shed light on many state-of-the-art fault mitigation techniques for DNNs.

PL

Znaczący rozwój sztucznej inteligencji (SI) wpływa na wiele otaczających nas aplikacji, do tego stopnia, że SI jest obecnie coraz częściej wykorzystywana w aplikacjach o krytycznym znaczeniu dla bezpieczeństwa. Sztuczna inteligencja na brzegu sieci (Edge) jest rzeczywistością, co oznacza wykonywanie obliczeń na danych bliżej źródła danych, w przeciwieństwie do wykonywania ich w chmurze. Aplikacje o krytycznym znaczeniu dla bezpieczeństwa mają wysokie wymagania dotyczące niezawodności; dlatego ważne jest, aby modele SI działające na brzegu sieci (tj. sprzęt) spełniały wymagane standardy bezpieczeństwa. Z rozległej dziedziny sztucznej inteligencji, głębokie sieci neuronowe (DNN) są centralnym punktem tego badania, ponieważ nadal przynoszą znakomite wyniki w różnych zastosowaniach, tj. medycznych, motoryzacyjnych, lotniczych, obronnych itp. Tradycyjne techniki niezawodności implementacji w przypadku DNN nie zawsze są praktyczne, ponieważ nie wykorzystują unikalnych cech DNN. Co więcej, istotne jest również zrozumienie docelowego sprzętu brzegowego, ponieważ wpływ usterek może być różny w układach ASIC i FPGA. Dlatego też w niniejszym przeglądzie najpierw zbadaliśmy wpływ usterek w układach ASIC i FPGA, a następnie staramy się zapewnić wgląd w ostatnie postępy poczynione w kierunku DNN odpornych na błędy. Omówiliśmy kilka czynników, które mogą wpływać na niezawodność sieci DNN. Ponadto rozszerzyliśmy tę dyskusję, aby rzucić światło na wiele najnowocześniejszych technik ograniczania błędów w sieciach DNN.

Słowa kluczowe

EN

fault tolerance; reliability; FPGAs; ASICs; neural networks

PL

odporność na błędy; niezawodność; układy FPGA; układy ASIC; sieci neuronowe

• Wydawca: Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów PIAP
• Czasopismo: Pomiary Automatyka Robotyka
• Rocznik: 2023
• Tom: R. 27, nr 2
• Strony: 89--98
• Opis fizyczny: Bibliogr. 45 poz., rys., wykr.

Twórcy

autor

Syed Rizwan Tariq

• IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

• https://orcid.org/0000-0001-9232-734X

autor

Ulbricht Markus

• IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

• https://orcid.org/0000-0001-9230-640X

autor

Piotrowski Krzysztof

• IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

• https://orcid.org/0000-0002-7231-6704

autor

Krstic Milos

• IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

• https://orcid.org/0000-0003-0267-0203

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Uwagi

1. This work was supported by the European Regional Development Fund within the BB-PL INTERREG V A 2014-2020 Program, “reducing barriers using the common strengths”, project SpaceRegion, grant number 85038043.

2. Opracowanie rekordu ze środków MEiN, umowa nr SONP/SP/546092/2022 w ramach programu "Społeczna odpowiedzialność nauki" - moduł: Popularyzacja nauki i promocja sportu (2022-2023).