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Scaling of numbers in residue arithmetic with the flexible selection of scaling factor

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Warianty tytułu
Konferencja
Computer Applications in Electrical Engineering 2013 (15-16.04.2013; Poznań, Polska)
Języki publikacji
EN
Abstrakty
EN
A scaling technique of numbers in residue arithmetic with the flexible selection of the scaling factor is presented. The required scaling factor can be selected from the set of moduli products of the Residue Number System (RNS) base. By permutation of moduli of the number system base it is possible to create many auxiliary Mixed-Radix Systems (MRS). They serve as the intermediate systems in the scaling process. All MRS's are associated with the given RNS with respect to the base, but they have different sets of weights. For the scaling factor value resulting from the requirements of the given signal processing algorithm, the suitable MRS can be chosen that allows to obtain the scaling result in most simple manner.
Rocznik
Tom
Strony
175--179
Opis fizyczny
Bibliogr. 12 poz., tab.
Twórcy
autor
  • Gdańsk University of Technology
autor
  • Gdańsk University of Technology
autor
  • Gdańsk University of Technology
Bibliografia
  • [1] White S.A.: Application of distributed arithmetic to digital signal processing: A tutorial review. IEEE ASSP Magazine. S.4-19. July 1989.
  • [2] Xilinx: The role of distributed arithmetic design in fpga-based signal processing. http://www.xilinx.com. 2000.
  • [3] Szabo N.S., Tanaka R.J., Residue Arithmetic and its Applications to Computer Technology, New York, McGraw-Hill, 1967.
  • [4] Soderstrand M. et al., Residue Number System Arithmetic, Modern Applications in Digital Signal Processing, IEEE Press, NY, 1986.
  • [5] Omondi A., Premkumar B., Residue Number Systems: Theory and Implementation, London, Imperial College Press, 2007.
  • [6] Zenon D. Ulman, Maciej Czyzak: Highly parallel, fast scaling of numbers in nonredundant residue arithmetic. IEEE Transactions on Signal Processing Volume 46, Number 2, pp. 487-496, February 1998.
  • [7] Kong Y., Phillips B., Fast Scaling in the Residue Number System. IEEE Transactions on VLSI Systems, Volume 17, Number 3, pp. 443-447, March 2009.
  • [8] Dasygenis M., Mitroglou K., Soudris D., Thanailakis A., A Full-Adder-Based Methodology for the Design of Scaling Operation in Residue Number System. IEEE Transactions on Circuits and Systems, Volume 55-1, Number 2, pp. 546-558, February 2008.
  • [9] Ma S., et al., 2n scaling scheme for signed RNS integers and its VLSI implementation, SCIENCE CHINA Information Sciences, Volume 53, Number 1, pp. 203-212, January 2010.
  • [10] Jullien G.A, Residue number scaling and other operations using ROM arrays, IEEE Trans, on Computers, Volume 27, Number 4, pp.325-336, April 1978.
  • [11] Miller D.D., Polky J.N., An implementation of the LMS algorithm in the residue number system, IEEE Transactions on Circuits and Systems, Volume 31, Number 5, pp.452-461, May 1984.
  • [12] Burgess N., Scaling an RNS Number Using the Core Function, 16 IEEE Symposium on Computer Arithmetic 2003: Santiago de Compostela, Spain, pp. 262-269, 2003.
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-2ca69ff1-d453-4760-a263-e18843dbd8d0
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