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Correction of sample-time error for time-interleaved sampling system using cubic spline interpolation

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Języki publikacji
EN
Abstrakty
EN
Sample-time errors can greatly degrade the dynamic range of a time-interleaved sampling system. In this paper, a novel correction technique employing a cubic spline interpolation is proposed for inter-channel sample-time error compensation. The cubic spline interpolation compensation filter is developed in the form of a finite-impulse response (FIR) filter structure. The correction method of the interpolation compensation filter coefficients is deduced. A 4GS/s two-channel, time-interleaved ADC prototype system has been implemented to evaluate the performance of the technique. The experimental results showed that the correction technique is effective to attenuate the spurious spurs and improve the dynamic performance of the system.
Rocznik
Strony
485--496
Opis fizyczny
Bibliogr. 22 poz., rys., wykr., wzory
Twórcy
autor
  • School of Information and Electronic, Beijing Institute of Technology, Beijing, 100081, China
  • China Academy of Electronics and Information Technology, Beijing 100041, China
autor
  • School of Information and Electronic, Beijing Institute of Technology, Beijing, 100081, China, (+86-10-68918658)
autor
  • School of Information and Electronic, Beijing Institute of Technology, Beijing, 100081, China
autor
  • School of Information and Electronic, Beijing Institute of Technology, Beijing, 100081, China
autor
  • School of Mechatronical Engineering, Beijing Institute of Technology, Beijing, 100081, China
Bibliografia
  • [1] Black, W. C., Hodges, D. A. (1980). Time interleaved converter arrays. IEEE J. Solid State Circuits, 15(6), 1022-1029.
  • [2] Kurosawa, N., Kobayashi, H., Maruyama, K., et al. (2001). Explicit analysis of channel mismatch effects in time-interleaved ADC systems. IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., 48(3), 261-271.
  • [3] Centurelli, F., Monsurrò, P., Trifiletti, A. (2012). Efficient digital background calibration of time-interleaved pipeline analog-to-digital converters. IEEE Trans. Circuits Syst. I, Reg. Papers, 59(7), 1373-1383.
  • [4] Law, C. H., Hurst, P. J., Lewis, S. H. (2010). A four-channel time-interleaved ADC with digital calibration of interchannel timing and memory errors. IEEE J. Solid-State Circuits, 45(10), 2091-2103.
  • [5] Wang, C. Y., Wu, J. T. (2006). A background timing-skew calibration technique for time-interleaved analog-to-digital converters. IEEE Trans. Circuits Syst. II, Exp. Briefs, 53(4), 299-303.
  • [6] Jridi, M., Monnerie, G., Bossuet, L., Dallet, D. (2006). An offset and gain calibration method for time-interleaved analog to digital converters. In Proc. IEEE 13th Int. Conf. Electron. Circuits Syst., Nice, 1097-1100.
  • [7] Pereira, J. M. D., Giräo, P. S., Serra, A. C. (2004). An FFT-based method to evaluate and compensate gain and offset errors of interleaved ADC systems. IEEE Trans. Instrum. Meas., 53(2), 423-430.
  • [8] Seo, M., Rodwell, M., Madhow, U. (2005). Blind correction of gain and sample-time errors for a two-channel time-interleaved analog-to-digital converter. In Proc. 39th IEEE Asilomar Conf. Signals, Syst., Comput., 1121-1125.
  • [9] Vogel, C., Hotz, M., Saleem, S., et al. (2012). A review on low-complexity structures and algorithms for the correction of mismatch errors in time-interleaved ADCs. In Proc. Int. Conf. on New Circuits and Syst. Conf., 349-352.
  • [10] Johansson, H. (2009). A polynomial-based time-varying filter structure for the compensation of frequency-response mismatch errors in time-interleaved ADCs. IEEE J. Selected Topics in Signal Process., 3(3), 384-396.
  • [11] Valimaki, V., Laakso, T. I. (2000). Principles of fractional delay filters. In Proc. Int. Conf. on Acoustics, Speech, and Signal Process., 3870-3873.
  • [12] Elbornsson, J., Gustafsson, F., Eklund, J. E. (2005). Blind equalization of time errors in a time-interleaved ADC system. IEEE Trans. Signal Process., 53(4), 1413-1424.
  • [13] Johansson, H., Lowenborg, P. (2002). Reconstruction of nonuniformly sampled bandlimited signals by means of digital fractional delay filters. IEEE Trans. Signal Process., 50(11), 2757-2767.
  • [14] Jin, H., Lee, E. K. (2000). A digital-background calibration technique for minimizing timing-error effects in time-interleaved ADCs. IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., 47(7), 603-613.
  • [15] Elbornsson, J., Gustafsson, F., Eklund, J. E. (2002). Amplitude and gain error influence on time error estimation algorithm for time interleaved A/D converter system. In Proc. Int. Conf. Acoust., Speech, Signal Process., 2, 1281-1284.
  • [16] B. Bradie. (2006). A Friendly Introduction To Numerical Analysis. New Jersey: Prentice-Hall.
  • [17] T. Sauer. (2010). Numerical Analysis, Simplified Chinese Translation Edition. Beijing, China: Post & Telecom Press.
  • [18] Ponnuru, S., Seo, M., Madhow, U., Rodwell, M. (2010). Joint mismatch and channel compensation for high-speed OFDM receivers with time-interleaved ADCs. IEEE Trans. Commun., 58(8), 2391-2401.
  • [19] Zou, Y. X., Xu, X. J. (2012). Blind Timing Skew Estimation Using Source Spectrum Sparsity in Time-Interleaved ADCs. IEEE Trans. Instrum. Meas., 61(9), 2401-2412.
  • [20] IEEE. (2001). IEEE Standardfor Terminology and Test Methods for Analog-to-Digital Converters.
  • [21] TS83102G0B 10-bit 2Gsps ADC datasheet. Datasheet for e2v Inc. www.e2v.com/e2v/assets/File/documents. (2009 January).
  • [22] AT84CS001 10-bit 1:2/4 2.2 GHz LVDS DMUX. Datasheet for e2v Inc. www.e2v.com/e2v/assets/File/documents. (2009 May).
Uwagi
EN
This work was supported by National Natural Science Foundation of China (grant No. 61001190.).
Typ dokumentu
Bibliografia
Identyfikator YADDA
bwmeta1.element.baztech-2aecbf9f-db3c-4c41-b521-d74b5f18013b
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